upd78f0730 Renesas Electronics Corporation., upd78f0730 Datasheet - Page 105

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upd78f0730

Manufacturer Part Number
upd78f0730
Description
8-bit Single-chip Microcontroller
Manufacturer
Renesas Electronics Corporation.
Datasheet

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5.6.4 Example of controlling USB clock
by PLL.
● Example of setting procedure when supplying the USB clock from the high-speed system clock (f
MHz)
The clock of the USB macro (f
<1> Setting PLLSTOP to 1 (PLLC register)
<2> Setting PLLM to 0/1 (PLLC register)
<3> Setting XSEL to 1 (MCM register)
<4> Clearing PLLSTOP to 0 (PLLC register)
<5> Waiting for oscillation stabilization of the PLL
<6> Setting UCKCNT to 1 (UCKC register)
[Control flow]
When PLLSTOP is set to 1, the PLL stops operation.
In the case of f
In the case of f
When XSEL is set to 1, the high-speed system clock is supplied to the PLL.
When PLLSTOP is cleared to 0, the PLL starts operating.
Wait for 800
When UCKCNT is set to 1, the USB clock is supplied to the USB macro.
µ
s by software. Other software processing can be executed while waiting.
XH
XH
= 12 MHz, PLLM is set to 0 in order to select “8 times”.
= 16 MHz, PLLM is set to 1 in order to select “12 times”.
USB
= 48 Mhz) uses multiplication of division clock of high-speed system clock ( f
Oscillation stabilization wait (
Preliminary User’s Manual U19014EJ1V0UD
CHAPTER 5 CLOCK GENERATOR
When f
When f
USB clock supplying (UCKCNT = 1)
PLL operation stop (PLLSTOP = 1)
PLL operation start (PLLSTOP = 0)
XH
XH
= 12 MHz, setting PLLM to 0.
= 16 MHz, setting PLLM to 1.
Setting XSEL to 1
800
µ
s)
XH
= 12/16
105
XH)

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