upd78f0730 Renesas Electronics Corporation., upd78f0730 Datasheet - Page 285

• Manufacturer Part Number: upd78f0730
• Description: 8-bit Single-chip Microcontroller
• Manufacturer: Renesas Electronics Corporation.

(3) UF0 EPNAK register (UF0EN)
UF0EN
Bit position
This register controls NAK of endpoints other than Endpoint0.
This register can be read or written in 8-bit units (however, bit 0 can only be read).
The BKO2NK bit can be written only when the BKO2NKM bit of the UF0ENM register is 1 and the BKO1NK bit
can be written only when the BKO1NKM bit of the UF0ENM register is 1.
The related bits are invalid if each endpoint is not supported by the setting of the UF0EnIM register (n = 1, 2)
and the current setting of the interface.
It takes five USB clocks to reflect the status on this register after the UF0FIC0 and UF0FIC1 registers have
been set. If it is necessary to read the status correctly, therefore, separate a write signal that accesses the
UF0FIC0 and UF0FIC1 registers from a read signal that accesses the UF0EPS0, UF0EPS1, UF0EPS2,
UF0E0N, and UF0EN registers by at least four USB clocks.
While NAK is being transmitted to Endpoint0 Read and Endpoint2, a write access to the BKO1NK and
BKO2NK bits is ignored.
Be sure to clear bits 7 to 3 and 1. If these bits are set to 1, the operation is not guaranteed.
2
7
0
BKO1NK
Bit name
6
0
CHAPTER 12 USB FUNCTION CONTROLLER (USBF)
This bit controls NAK to Endpoint2 (bulk 1 transfer (OUT)).
This bit is set to 1 only when the FIFO connected to the SIE side of the UF0BO1 register
(64-byte FIFO of bank configuration) cannot receive data. It is cleared to 0 when a
toggle operation is performed. The bank is changed (toggle operation) when the
following conditions are satisfied.
FW should be used to read data of the UF0BO1L register when it has received the
BKO1DT interrupt request and read as many data from the UF0BO1 register as the
value of that data. To not receive data from the USB bus for some reason even if USBF
is ready to receive data, set this bit to 1 by FW. In this case, USBF keeps transmitting
NAK until the FW clears this bit to 0. This bit is also cleared to 0 as soon as the UF0BO1
register has been cleared.
5
0
1: Transmit NAK.
0: Do not transmit NAK (default value).
• Data correctly received is stored in the FIFO connected to the SIE side.
• The value of the FIFO counter connected to the CPU side is 0 (completion of
reading).
Preliminary User’s Manual U19014EJ1V0UD
4
0
3
0
BKO1NK
2
Function
1
0
BKI1NK
0
Address
FF62H
After reset
00H
(1/2)
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