upd78f0730 Renesas Electronics Corporation., upd78f0730 Datasheet - Page 227

no-image

upd78f0730

Manufacturer Part Number
upd78f0730
Description
8-bit Single-chip Microcontroller
Manufacturer
Renesas Electronics Corporation.
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
upd78f0730MC(S)-CAB-AX/JM
Manufacturer:
NEC
Quantity:
538
Part Number:
upd78f0730MC(S)-CAB-AX/JM
Manufacturer:
RENESAS
Quantity:
1 000
Part Number:
upd78f0730MC(S)-CAB-AX/JM
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
Part Number:
upd78f0730MC-CAB-AX
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
10.3 Registers Controlling Serial Interface UART6
(1) Asynchronous serial interface operation mode register 6 (ASIM6)
Address: FF50H After reset: 01H R/W
Serial interface UART6 is controlled by the following seven registers.
• Asynchronous serial interface operation mode register 6 (ASIM6)
• Asynchronous serial interface reception error status register 6 (ASIS6)
• Asynchronous serial interface transmission status register 6 (ASIF6)
• Clock selection register 6 (CKSR6)
• Baud rate generator control register 6 (BRGC6)
• Port mode register 1 (PM1)
• Port register 1 (P1)
Notes 1.
Symbol
ASIM6
This 8-bit register controls the serial communication operations of serial interface UART6.
This register can be set by a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation sets this register to 01H.
Remark ASIM6 can be refreshed (the same value is written) by software during a communication operation
Figure 10-2. Format of Asynchronous Serial Interface Operation Mode Register 6 (ASIM6) (1/2)
2.
(when bit 7 (POWER6) and bit 6 (TXE6) of ASIM6 = 1 or bit 7 (POWER6) and bit 5 (RXE6) of ASIM6
= 1).
POWER6
The output of the T
when POWER6 = 0 during transmission.
Asynchronous serial interface reception error status register 6 (ASIS6), asynchronous serial interface
transmission status register 6 (ASIF6), and receive buffer register 6 (RXB6) are reset.
POWER6
RXE6
TXE6
0
<7>
Note 1
1
0
1
0
1
Disables operation of the internal operation clock (fixes the clock to low level) and asynchronously
resets the internal circuit
Enables operation of the internal operation clock
Disables transmission (synchronously resets the transmission circuit).
Enables transmission
Disables reception (synchronously resets the reception circuit).
Enables reception
TXE6
<6>
X
D6 pin goes high level and the input from the R
CHAPTER 10 SERIAL INTERFACE UART6
Preliminary User’s Manual U19014EJ1V0UD
RXE6
<5>
Enables/disables operation of internal operation clock
Note 2
.
PS61
4
Enables/disables transmission
Enables/disables reception
PS60
3
CL6
2
X
D6 pin is fixed to the high level
SL6
1
ISRM6
0
227

Related parts for upd78f0730