upd78f0730 Renesas Electronics Corporation., upd78f0730 Datasheet - Page 92

• Manufacturer Part Number: upd78f0730
• Description: 8-bit Single-chip Microcontroller
• Manufacturer: Renesas Electronics Corporation.

92
(8) PLL control register (PLLC)
This register sets the operation mode of PLL.
PLLC can be set by a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation sets this register to 01H.
Address: FFA6H
Symbol
PLLC
Notes 1. f
Cautions.
PLLSTOP
XSEL
7
0
0
1
0
1
After reset: 01H
2. f
USB
USB
PLL oscillating
PLL stopped
When using the USB function, set the clock supplied to PLL as initial setting after
reset.
<Setting procedure>
<1> Stop PLL. (PLLSTOP=1)
<2> Select PLLM (0: f
<3 > Set XSEL to 1.
<4> enable PLL driven. (PLLSTOP=0)
= 48 MHz when f
= 48 MHz when f
Figure 5-9. Format of PLL Control Register (PLLC)
PLLM
0
1
0
1
6
0
R/W
Preliminary User’s Manual U19014EJ1V0UD
CHAPTER 5 CLOCK GENERATOR
Setting prohibited
Setting prohibited
f
f
XH
XH
/2
/4
5
0
XH
XH
Selection of multiplication ratio for clock supplied to PLL/PLL
= 12 MHz.
= 16 MHz.
Supply clock
XH
=12 MHz 1: f
4
0
PLL operation control
XH
3
0
=16 MHz ).
Setting prohibited
Setting prohibited
x8
x12
Note 1
Note 2
Multiplication ratio selection
2
0
PLLM
<1>
PLLSTOP
<0>