upd78f0730 Renesas Electronics Corporation., upd78f0730 Datasheet - Page 110

• Manufacturer Part Number: upd78f0730
• Description: 8-bit Single-chip Microcontroller
• Manufacturer: Renesas Electronics Corporation.

(5) HALT mode (D) set while CPU is operating with high-speed system clock (C)
(6) STOP mode (E) set while CPU is operating with high-speed system clock (C)
5.6.7 Condition before changing CPU clock and processing after changing CPU clock
110
(C) → (D)
Internal high-
speed oscillation
clock
X1 clock
External main
system clock
(C) → (E)
Before Change
Remark (A) to (E) in Table 5-4 correspond to (A) to (E) in Figure 5-14.
Condition before changing the CPU clock and processing after changing the CPU clock are shown below.
CPU Clock
Status Transition
Status Transition
X1 clock
External main
system clock
Internal high-
speed oscillation
clock
Table 5-4. CPU Clock Transition and SFR Register Setting Examples (3/3)
After Change
(Setting sequence)
Stabilization of X1 oscillation
• MSTOP = 0, OSCSEL = 1, EXCLK = 0
• After elapse of oscillation stabilization time
Enabling input of external clock from EXCLK
pin
• MSTOP = 0, OSCSEL = 1, EXCLK = 1
Oscillation of internal high-speed oscillator
• RSTOP = 0
Preliminary User’s Manual U19014EJ1V0UD
CHAPTER 5 CLOCK GENERATOR
Table 5-5. Changing CPU Clock
Condition Before Change
Executing HALT instruction
Stopping peripheral functions that
cannot operate in STOP mode
• Internal high-speed oscillator can be
• Clock supply to CPU is stopped for 5
X1 oscillation can be stopped (MSTOP = 1).
External main system clock input can be
disabled (MSTOP = 1).
Setting
Setting
stopped (RSTOP = 1).
(MIN.) after AMPH has been set to 1.
Executing STOP instruction
Processing After Change
µ
s