upd78f0730 Renesas Electronics Corporation., upd78f0730 Datasheet - Page 9
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upd78f0730
Manufacturer Part Number
upd78f0730
Description
8-bit Single-chip Microcontroller
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.UPD78F0730.pdf
(518 pages)
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CHAPTER 4 PORT FUNCTIONS........................................................................................................... 60
CHAPTER 5 CLOCK GENERATOR ...................................................................................................... 81
3.4
4.1
4.2
4.3
4.4
4.5
5.1
5.2
5.3
5.4
5.5
5.6
Operand Address Addressing ................................................................................................ 51
3.4.1
3.4.2
3.4.3
3.4.4
3.4.5
3.4.6
3.4.7
3.4.8
3.4.9
Port Functions.......................................................................................................................... 60
Port Configuration ................................................................................................................... 61
4.2.1
4.2.2
4.2.3
4.2.4
4.2.5
Registers Controlling Port Function...................................................................................... 76
Port Function Operations........................................................................................................ 79
4.4.1
4.4.2
4.4.3
Settings of Port Mode Register and Output Latch When Using Alternate Function ........ 80
Functions of Clock Generator ................................................................................................ 81
Configuration of Clock Generator.......................................................................................... 82
Registers Controlling Clock Generator ................................................................................. 84
System Clock Oscillator.......................................................................................................... 94
5.4.1
5.4.2
5.4.3
5.4.4
Clock Generator Operation ..................................................................................................... 97
Controlling Clock ..................................................................................................................... 99
5.6.1
5.6.2
5.6.3
5.6.4
5.6.5
5.6.6
5.6.7
5.6.8
5.6.9
5.6.10
Implied addressing .....................................................................................................................51
Register addressing ...................................................................................................................52
Direct addressing .......................................................................................................................53
Short direct addressing ..............................................................................................................54
Special function register (SFR) addressing................................................................................55
Register indirect addressing.......................................................................................................56
Based addressing ......................................................................................................................57
Based indexed addressing.........................................................................................................58
Stack addressing .......................................................................................................................59
Port 0 .........................................................................................................................................62
Port 1 .........................................................................................................................................64
Port 3 .........................................................................................................................................70
Port 6 .........................................................................................................................................72
Port 12 .......................................................................................................................................73
Writing to I/O port .......................................................................................................................79
Reading from I/O port.................................................................................................................79
Operations on I/O port................................................................................................................79
X1 oscillator ...............................................................................................................................94
Internal high-speed oscillator .....................................................................................................96
Internal low-speed oscillator.......................................................................................................96
Prescaler....................................................................................................................................96
Controlling high-speed system clock..........................................................................................99
Example of controlling internal high-speed oscillation clock.....................................................102
Example of controlling internal low-speed oscillation clock ......................................................104
Example of controlling USB clock ............................................................................................105
Clocks supplied to CPU and peripheral hardware....................................................................106
CPU clock status transition diagram ........................................................................................107
Condition before changing CPU clock and processing after changing CPU clock ...................110
Time required for switchover of CPU clock and main system clock .........................................111
Conditions before clock oscillation is stopped..........................................................................112
Peripheral hardware and source clocks ...................................................................................112
Preliminary User’s Manual U19014EJ1V0UD
9
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