upd78f0730 Renesas Electronics Corporation., upd78f0730 Datasheet - Page 44
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upd78f0730
Manufacturer Part Number
upd78f0730
Description
8-bit Single-chip Microcontroller
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.UPD78F0730.pdf
(518 pages)
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44
FF33H
FF37H
FF38H
FF39H
FF3AH
FF3BH
FF3CH
FF41H
FF43H
FF48H
FF49H
FF4AH
FF4BH
FF4CH
FF4DH
FF4EH
FF50H
FF53H
FF55H
FF56H
FF57H
FF60H
FF61H
FF62H
FF63H
FF64H
FF65H
FF66H
FF67H
FF68H
FF69H
FF6AH
FF6BH
FF6CH
FF6DH
FF70H
FF71H
FF72H
Address
Pull-up resistor option register 3
UF0 INT mask 0 register
UF0 INT mask 1 register
UF0 INT mask 2 register
UF0 INT mask 3 register
UF0 INT mask 4 register
Pull-up resistor option register 12
8-bit timer compare register 51
8-bit timer mode control register 51
External interrupt rising edge enable register
External interrupt falling edge enable register
UF0 INT clear 0 register
UF0 INT clear 1 register
UF0 INT clear 2 register
UF0 INT clear 3 register
UF0 INT clear 4 register
Asynchronous serial interface operation mode
register 6
Asynchronous serial interface reception error
status register 6
Asynchronous serial interface transmission
status register 6
Clock selection register 6
Baud rate generator control register 6
UF0 EP0NAK register
UF0 EP0NAKALL register
UF0 EPNAK register
UF0 EPNAK mask register
UF0 SNDSIE register
UF0 CLR request register
UF0 SET request register
UF0 EP status 0 register
UF0 EP status 1 register
UF0 EP status 2 register
Timer clock selection register 50
8-bit timer mode control register 50
8-bit timer H mode register 1
8-bit timer H carrier control register 1
UF0 active interface number register
UF0 active alternative setting register
UF0 alternative setting status register
Special Function Register (SFR) Name
Table 3-7. Special Function Register List (2/4)
Preliminary User’s Manual U19014EJ1V0UD
CHAPTER 3 CPU ARCHITECTURE
PU3
UF0IM0
UF0IM1
UF0IM2
UF0IM3
UF0IM4
PU12
CR51
TMC51
EGP
EGN
UF0IC0
UF0IC1
UF0IC2
UF0IC3
UF0IC4
ASIM6
ASIS6
ASIF6
CKSR6
BRGC6
UF0E0N
UF0E0NA
UF0EN
UF0ENM
UF0SDS
UF0CLR
UF0SET
UF0EPS0
UF0EPS1
UF0EPS2
TCL50
TMC50
TMHMD1
TMCYC1
UF0AIFN
UF0AAS
UF0ASS
Symbol
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
W
W
W
W
W
R
R
R
R
R
R
R
1 Bit
Manipulatable Bit Unit
8 Bits
16 Bits
Reset
After
FFH
FFH
FFH
FFH
FFH
FFH
FFH
00H
00H
00H
00H
00H
00H
00H
00H
00H
00H
00H
01H
00H
00H
00H
00H
00H
00H
00H
00H
00H
00H
00H
00H
00H
00H
00H
00H
00H
01H
1FH
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