upd78f0730 Renesas Electronics Corporation., upd78f0730 Datasheet - Page 478

• Manufacturer Part Number: upd78f0730
• Description: 8-bit Single-chip Microcontroller
• Manufacturer: Renesas Electronics Corporation.

478
8-bit
operation
Instruction
Notes 1.
Remarks 1. One instruction clock cycle is one cycle of the CPU clock (f
Group
2.
3.
OR
XOR
CMP
Mnemonic
2. This clock cycle applies to the internal ROM program.
When the internal high-speed RAM area is accessed or for an instruction with no data access
When an area except the internal high-speed RAM area is accessed
Except “r = A”
control register (PCC).
A, #byte
saddr, #byte
A, r
r, A
A, saddr
A, !addr16
A, [HL]
A, [HL + byte]
A, [HL + B]
A, [HL + C]
A, #byte
saddr, #byte
A, r
r, A
A, saddr
A, !addr16
A, [HL]
A, [HL + byte]
A, [HL + B]
A, [HL + C]
A, #byte
saddr, #byte
A, r
r, A
A, saddr
A, !addr16
A, [HL]
A, [HL + byte]
A, [HL + B]
A, [HL + C]
Operands
Preliminary User’s Manual U19014EJ1V0UD
CHAPTER 21 INSTRUCTION SET
Note 3
Note 3
Note 3
Bytes
3
2
3
2
3
2
2
2
2
2
3
1
2
2
2
2
2
2
3
1
2
2
2
2
2
2
3
1
2
2
Note 1
4
6
4
4
4
8
4
8
8
8
4
6
4
4
4
8
4
8
8
8
4
6
4
4
4
8
4
8
8
8
Clocks
Note 2
−
8
−
−
5
9
5
9
9
9
−
8
−
−
5
9
5
9
9
9
−
8
−
−
5
9
5
9
9
9
A ← A ∨ byte
(saddr) ← (saddr) ∨ byte
A ← A ∨ r
r ← r ∨ A
A ← A ∨ (saddr)
A ← A ∨ (addr16)
A ← A ∨ (HL)
A ← A ∨ (HL + byte)
A ← A ∨ (HL + B)
A ← A ∨ (HL + C)
A ← A ∨ byte
(saddr) ← (saddr) ∨ byte
A ← A ∨ r
r ← r ∨ A
A ← A ∨ (saddr)
A ← A ∨ (addr16)
A ← A ∨ (HL)
A ← A ∨ (HL + byte)
A ← A ∨ (HL + B)
A ← A ∨ (HL + C)
A − byte
(saddr) − byte
A − r
r − A
A − (saddr)
A − (addr16)
A − (HL)
A − (HL + byte)
A − (HL + B)
A − (HL + C)
CPU
) selected by the processor clock
Operation
Z AC CY
×
×
×
×
×
×
×
×
×
×
×
×
×
×
×
×
×
×
×
×
×
×
×
×
×
×
×
×
×
×
Flag
×
×
×
×
×
×
×
×
×
×
×
×
×
×
×
×
×
×
×
×