nt1gt64u8hb0bn-3c Nanya Techology, nt1gt64u8hb0bn-3c Datasheet - Page 16

• Manufacturer Part Number: nt1gt64u8hb0bn-3c
• Description: Pc2-4200 / Pc2-5300 / Pc-6400 Unbuffered Ddr2 So-dimm
• Manufacturer: Nanya Techology

NT256T64UH4B0FN / NT512T64UH8B0FN / NT1GT64U8HB0BN
NT256T64UH4B0CN / NT512T64UH8B0CN / NT1GT64U8HB0AN
256MB: 32M x 64 / 512MB: 64M x 64 / 1GB: 128M x 64
PC2-4200 / PC2-5300 / PC-6400 Unbuffered DDR2 SO-DIMM
Operating, Standby, and Refresh Currents
T
REV 1.2
08/2007
CASE
Note: Module IDD was calculated from component IDD. It may differ from the actual measurement.
Symbol
IDD3PF
IDD3PS
IDD4W
IDD2Q Precharge quiet standby current
IDD2P
IDD2N
IDD3N
IDD4R
IDD5B
IDD5D
IDD0
IDD1
IDD6
IDD7
= 0 ° C ~ 85 °C; V
Operating Current: one bank; active/precharge; t
DQ, DM, and DQS inputs changing twice per clock cycle; address and
control inputs changing once per clock cycle
Operating Current: one bank; active/read/precharge; Burst = 4; t
(MIN)
once per clock cycle
Precharge Power-Down Standby Current: all banks idle; power-down
mode; CKE ≤ V
Idle Standby Current: CS ≥ V
(MIN)
Active Power-Down Standby Current: one bank active; power-down
mode; CKE ≤ V
Active Power-Down Standby Current: one bank active; power-down
mode; CKE ≤ V
Active Standby Current: one bank; active/precharge; CS ≥ V
V
twice per clock cycle; address and control inputs changing once per clock
cycle
Operating Current: one bank; Burst = 4; reads; continuous burst; address
and control inputs changing once per clock cycle; DQ and DQS outputs
changing twice per clock cycle; CL = 4; t
Operating Current: one bank; Burst = 4; writes; continuous burst; address
and control inputs changing once per clock cycle; DQ and DQS inputs
changing twice per clock cycle; CL= 4; t
Burst Refresh Current: t
Distributed Refresh Current: t
Self-Refresh Current: CKE ≤ 0.2V
Operating Current: four bank; four bank interleaving with BL = 4, address
and control inputs randomly changing; 50% of data changing at every
transfer; t
IH (MIN)
; CL= 4; t
; address and control inputs changing once per clock cycle
; t
RC
DDQ
RC
= t
= t
CK
= V
RAS (MAX)
RC (min)
= t
IL (MAX)
IL (MAX)
IL (MAX)
DD
CK (MIN)
= 1.8V
; I
; t
; t
; t
; t
OUT
CK
CK
CK
CK
; I
RFC
Parameter/Condition
OUT
= t
= t
= t
= t
= 0mA.
= t
0.1V (256MB, 1 Rank, 32Mx16 DDR2 SDRAMs)
CK (MIN)
CK (MIN)
CK (MIN)
CK (MIN)
= 0mA; address and control inputs changing
IH (MIN)
RFC
RFC (MIN)
= t
; MRS(12)=0
; MRS(12)=1
; all banks idle; CKE ≥ V
; DQ, DM, and DQS inputs changing
REF
CK
CK
= t
= t
CK (MIN)
CK (MIN)
RC
= t
; I
16
RC (MIN)
OUT
= 0mA
IH (MIN)
; t
IH (MIN)
CK
= t
; t
RC
; CKE ≥
CK
CK (MIN)
= t
= t
NANYA reserves the right to change products and specifications without notice.
RC
CK
;
PC2-4300
(-37B)
1144
374
418
154
176
123
189
594
638
660
31
40
40
31
PC2-5300
(-3C)
© NANYA TECHNOLOGY CORPORATION
1166
396
440
176
202
145
220
682
748
748
31
40
40
31
PC2-6400
(-25D)
1210
440
506
198
224
172
264
792
880
836
31
40
40
31
Unit
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA