nt2gc64b88g0nf Nanya Techology, nt2gc64b88g0nf Datasheet - Page 13

• Manufacturer Part Number: nt2gc64b88g0nf
• Description: Unbuffered Ddr3 Sdram Dimm
• Manufacturer: Nanya Techology

NT2GC64B88G0NF / NT4GC64B8HG0NF
2GB: 256M x 64 / 4GB: 512M x 64
PC3-10600 / PC3-12800
Unbuffered DDR3 SDRAM DIMM
REV 1.0
05/2011
Command and Address Timing
DLL locking time
Internal READ Command to PRECHARGE Command delay
Delay from start of internal write
transaction to internal read command
WRITE recovery time
Mode Register Set command cycle time
Mode Register Set command update delay
ACT to internal read or write delay time
PRE command period
ACT to ACT or REF command period
CAS# to CAS# command delay
Auto precharge write recovery + precharge time
Multi-Purpose Register Recovery Time
ACTIVE to PRECHARGE command period
ACTIVE to ACTIVE command period for 1KB page size
ACTIVE to ACTIVE command period for 2KB page size
Four activate window for 1KB page size
Four activate window for 2KB page size
Command and Address setup time to CK, CK#
referenced to Vih(ac) / Vil(ac) levels
Command and Address hold time from CK, CK#
referenced to Vih(dc) / Vil(dc) levels
Command and Address setup time to CK, CK#
referenced to Vih(ac) / Vil(ac) levels
Control and Address Input pulse width for each input
Calibration Timing
Power-up and RESET calibration time
Normal operation Full calibration time
Normal operation Short calibration time
Reset Timing
Exit Reset from CKE HIGH to a valid command
Self Refresh Timings
Exit Self Refresh to commands not requiring a locked DLL
Exit Self Refresh to commands requiring a locked DLL
Minimum CKE low width for Self Refresh entry to exit timing
Valid Clock Requirement after Self Refresh Entry (SRE)
or Power-Down Entry (PDE)
Valid Clock Requirement before Self Refresh Exit (SRX)
or Power-Down Exit (PDX) or Reset Exit
Power Down Timings
Exit Power Down with DLL on to any valid command;
Exit Precharge Power Down with DLL frozen to commands
not requiring a locked DLL
Exit Precharge Power Down with DLL frozen to commands
requiring a locked DLL
CKE minimum pulse width
Command pass disable delay
Power Down Entry to Exit Timing
Timing of ACT command to Power Down entry
Timing of PRE or PREA command to Power Down entry
tDLLK
tRTP
tWTR
tWR
tMRD
tMOD
tRCD
tRP
tRC
tCCD
tDAL(min)
tMPRR
tRAS
tRRD
tRRD
tFAW
tFAW
tIS(base)
tIH(base)
tIS(base) AC150
tIPW
tZQinit
tZQoper
tZQCS
tXPR
tXS
tXSDLL
tCKESR
tCKSRE
tCKSRX
tXP
tXPDLL
tCKE
tCPDED
tPD
tACTPDEN
tPRPDEN
13
max(4nCK, 7.5ns)
125+150
tXPRmin.: max(5nCK, tRFC(min) + 10ns)
tXSmin.: max(5nCK, tRFC(min) + 10ns)
37.5
512
125
200
780
512
256
15
50
64
4
4
1
tCKESRmin.: tCKE(min) + 1 nCK
tCKSREmin.: max(5 nCK, 10 ns)
tCKSRXmin.: max(5 nCK, 10 ns)
tXPDLLmin.: max(10nCK, 24ns)
tCKEmin.: max(3nCK 5.625ns)
WR + roundup(tRP / tCK(avg))
tMODmin.: max(12nCK, 15ns)
tWTRmin.: max(4nCK, 7.5ns)
tRTPmin.: max(4nCK, 7.5ns)
tRRDmin.: max(4nCK, 10ns)
tXPmin.: max(3nCK, 7.5ns)
tXSDLLmin.: tDLLK(min)
NANYA reserves the right to change products and specifications without notice.
Standard Speed Bins
tPDmin.: tCKE(min)
tACTPDENmax.: -
tPDmax.: 9*tREFI
tACTPDENmin.: 1
tPRPDENmax.: -
tPRPDENmin.: 1
tCKESRmax.: -
tCKSREmax.: -
tCKSRXmax.: -
tCPDEDmin.: 1
tCPDEDmin.: -
tXSDLLmax.: -
tXPDLLmax.: -
tXPRmax.: -
tCKEmax.: -
tRTPmax.: -
tWTRmax.:
tMODmax.:
tRRDmax.:
tXSmax.: -
tXPmax.: -
© NANYA TECHNOLOGY CORPORATION
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nCK
ns
nCK
nCK
nCK
nCK
ns
ns
ps
ps
ps
ps
nCK
nCK
nCK
nCK
nCK
nCK
nCK