tda9983bhw/8/c1 NXP Semiconductors, tda9983bhw/8/c1 Datasheet - Page 59

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tda9983bhw/8/c1

Manufacturer Part Number
tda9983bhw/8/c1
Description
Hdmi Transmitter Up To 150 Mhz Pixel Rate With 3 ? 8-bit Video Inputs And 4 ? I 2s-bus With S/pdif
Manufacturer
NXP Semiconductors
Datasheet

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NXP Semiconductors
TDA9983B_1
Product data sheet
Table 70.
Legend: * = default value
Table 71.
Legend: * = default value
Table 72.
Legend: * = default value
Table 73.
Legend: * = default value
Bit
7 to 4
3 to 0
Bit
7 to 4
3 to 2
1 to 0
Bit
7 to 1
0
Bit
7
6 to 5
4
3 to 2
Symbol
SRL_PHASE3[3:0]
SRL_PHASE2[3:0]
Symbol
x
SRL_FORCE[1:0]
SRL_CLK[1:0]
Symbol
x
SCG_FDN
Symbol
BYPASS_SCG
x
SELPLLCLKIN
x
SERIALIZER register (address 03h) bit description
BUFFER_OUT register (address 04h) bit description
PLL_SCG1 register (address 05h) bit description
PLL_SCG2 register (address 06h) bit description
Rev. 01 — 20 May 2008
Access Value
R/W
R/W
Access Value
R/W
R/W
R/W
Access Value
R/W
R/W
Access Value
R/W
R/W
R/W
R/W
0000*
0000*
0000*
00*
01
10
11
00*
01
10
11
0000
000*
0
1*
0
1*
00*
0
1*
00*
Description
serializer phase 3: phase selection of third
storage level of the serializer input
serializer phase 2: phase selection of second
storage level of the serializer input
Description
undefined
serializer force
serializer clock
Description
undefined
scg fnd
Description
bypass scg
undefined
select PLL clock input
undefined
TMDS outputs active (normal operation)
TMDS outputs active (normal operation)
TMDS outputs forced '0'
TMDS outputs forced '1'
TMDS TXC = TMDSclk (normal operation)
TMDS TXC = SERclk / 2
TMDS TXC = undefined
TMDS TXC = SERclk
normal (PLL loop active)
standby (PLL loop open)
SCAclko = scg_nosc predivider output
SCAclko = pllscg_inref
pllscg_in = pllsca_inref
pllscg_in = pllclkin
150 MHz pixel rate HDMI transmitter
TDA9983B
© NXP B.V. 2008. All rights reserved.
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