tda9983bhw/8/c1 NXP Semiconductors, tda9983bhw/8/c1 Datasheet - Page 8

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tda9983bhw/8/c1

Manufacturer Part Number
tda9983bhw/8/c1
Description
Hdmi Transmitter Up To 150 Mhz Pixel Rate With 3 ? 8-bit Video Inputs And 4 ? I 2s-bus With S/pdif
Manufacturer
NXP Semiconductors
Datasheet

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NXP Semiconductors
8. Functional description
TDA9983B_1
Product data sheet
8.1 System clock
8.2 Video input processor
[1]
The TDA9983B is designed to convert digital data (video and audio) into an HDMI or a
DVI stream. This HDMI stream can handle RGB, YC
TDA9983B can accept at its inputs any of the following video modes:
It can also handle audio. The TDA9983B can accept at its inputs any of the following audio
buses:
The clock management is based on a set of 3 PLLs that generate the different clocks
required inside the chip. This includes:
The TDA9983B has three video input ports VPA[7:0], VPB[7:0] and VPC[7:0]. The
TDA9983B can reallocate and swap each of the 3 ports input channels by inverting the
bus and swapping each port.
The TDA9983B can be set to latch data at either the rising or falling edge or both.
The video input formats accept (see
P = power supply; G = ground; I = input; O = output.
RGB
YC
YC
YC
I
S/PDIF (1 channel): L-PCM (IEC 60958) or compressed audio (IEC 61937)
PLL double edge can generate a clock at twice the VCLK input frequency to capture
the data at the video input formatter
PLL scaling can create a new video processing scaled clock taking into account the
scaling ratio programmed in the scaler
PLL serializer is a system clock generator, which enables the stream produced by the
encoder to be transmitted on the HDMI data channel at ten times the sampling rate or
more; see
RGB
YC
YC
YC
2
S-bus (4 lines): up to 8 audio channels
B
B
B
B
B
B
C
C
C
C
C
C
R
R
R
R
R
R
4 : 4 : 4
4 : 2 : 2 semi-planar
4 : 2 : 2 ITU656 and ITU656-like
4 : 4 : 4 (up to 3
4 : 2 : 2 semi-planar (up to 2
4 : 2 : 2 compliant with ITU656 and ITU656-like (up to 1
Section 8.14.2
Rev. 01 — 20 May 2008
8-bit)
Table
5):
12-bit)
150 MHz pixel rate HDMI transmitter
B
C
R
4 : 4 : 4 and YC
TDA9983B
12-bit)
© NXP B.V. 2008. All rights reserved.
B
C
R
4 : 2 : 2. The
8 of 119

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