tda9983bhw/8/c1 NXP Semiconductors, tda9983bhw/8/c1 Datasheet - Page 91

• Manufacturer Part Number: tda9983bhw/8/c1
• Description: Hdmi Transmitter Up To 150 Mhz Pixel Rate With 3 ? 8-bit Video Inputs And 4 ? I 2s-bus With S/pdif
• Manufacturer: NXP Semiconductors

NXP Semiconductors
Table 101. CH_STAT_B_x channel status bytes 0, 1, 3 and 4 registers (address 14h to 17h) bit description
Legend: * = default value
Table 102. CH_STAT_B_2_APx_n channel status byte 2 registers (address 18h to 1Fh) bit description
Legend: * = default value
Table 103. ISRC1 packet registers (address 20h to 3Eh) bit description
Legend: * = default value
TDA9983B_1
Product data sheet
Address
14h
15h
16h
17h
Address
18h
19h
1Ah
1Bh
1Ch
1Dh
1Eh
1Fh
Address Register
20h
21h
ISRC1_PACKET_
TYPE
ISRC1_CTRL
Register
CH_STAT_B_2_AP0_L
CH_STAT_B_2_AP0_R
CH_STAT_B_2_AP1_L
CH_STAT_B_2_AP1_R
CH_STAT_B_2_AP2_L
CH_STAT_B_2_AP2_R
CH_STAT_B_2_AP3_L
CH_STAT_B_2_AP3_R
Register
CH_STAT_B_0
CH_STAT_B_1
CH_STAT_B_3
CH_STAT_B_4
9.7.2 ISRC packets registers
Below is an example of use. Please refer to HDMI 1.2a specification for the correct
definition of data bytes.
See HDMI 1.2a specification, section 8.8 for rules regarding the use of the ISRC packets.
Bit
7 to 0 ISRC1_PACKET_TYPE[7:0] R/W
7
6
5 to 3 ISRC1_RSVD[5:3]
2 to 0 ISRC_STATUS[2:0]
Bit
7 to 0
7 to 0
7 to 0
7 to 0
Bit
7 to 0
7 to 0
7 to 0
7 to 0
7 to 0
7 to 0
7 to 0
7 to 0
Symbol
ISRC_CONT
ISRC_VALID
Symbol
CH_STAT_BYTE_2_AP0_L[7:0]
CH_STAT_BYTE_2_AP0_R[7:0] R/W
CH_STAT_BYTE_2_AP1_L[7:0]
CH_STAT_BYTE_2_AP1_R[7:0] R/W
CH_STAT_BYTE_2_AP2_L[7:0]
CH_STAT_BYTE_2_AP2_R[7:0] R/W
CH_STAT_BYTE_2_AP3_L[7:0]
CH_STAT_BYTE_2_AP3_R[7:0] R/W
Symbol
CH_STAT_BYTE_0[7:0]
CH_STAT_BYTE_1[7:0]
CH_STAT_BYTE_3[7:0]
CH_STAT_BYTE_4[7:0]
Rev. 01 — 20 May 2008
Access Value Description
R/W
R/W
R/W
R/W
Access Value
R/W
R/W
R/W
R/W
Access Value
R/W
R/W
R/W
R/W
150 MHz pixel rate HDMI transmitter
05h*
0*
0*
000*
000*
001
010
100
ISRC1 packet type: packet type
of the ISRC1 packet
ISRC continued: ISRC continued
in next packet
ISRC valid: ISRC status and data
are valid
ISRC1 reserved: reserved (shall
be zero)
ISRC status
00h*
00h*
00h*
00h*
00h*
00h*
00h*
00h*
00h*
00h*
00h*
00h*
starting position
intermediate position
ending position
Description
channel status byte 2
of audio port x:
x = 0 to 3
TDA9983B
Description
channel status byte x:
x = 0 to 4
audio port 0 left
audio port 0 right
audio port 1 left
audio port 1 right
audio port 2 left
audio port 2 right
audio port 3 left
audio port 3 right
byte 0
byte 1
byte 3
byte 4
© NXP B.V. 2008. All rights reserved.
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