tda9983bhw/8/c1 NXP Semiconductors, tda9983bhw/8/c1 Datasheet - Page 87

• Manufacturer Part Number: tda9983bhw/8/c1
• Description: Hdmi Transmitter Up To 150 Mhz Pixel Rate With 3 ? 8-bit Video Inputs And 4 ? I 2s-bus With S/pdif
• Manufacturer: NXP Semiconductors

NXP Semiconductors
Table 94.
Legend: * = default value
TDA9983B_1
Product data sheet
Address Register
07h
06h
05h
ACR_CTS_2
ACR_CTS_1
ACR_CTS_0
ACR_CTS_x registers (address 05h to 07h) bit description
9.7.1 Audio input processor control registers
Table 91.
Legend: * = default value
Table 92.
Legend: * = default value
Table 93.
Legend: * = default value
Bit
7
6
5
4 to 3
2
1
0
Bit
7 to 5
4 to 0
Bit
7 to 0
Bit
7 to 4
3 to 0
7 to 0
7 to 0
Symbol
x
RST_CTS
ACR_MAN
x
LAYOUT
SWAP
RST_FIFO
Symbol
x
CA_I2S[4:0]
Symbol
LATENCY_RD[7:0]
AIP_CNTRL_0 register (address 00h) bit description
CA_I2S register (address 01h) bit description
LATENCY_RD register (address 04h) bit description
Symbol
x
CTS[19:16]
CTS[15:8]
CTS[7:0]
Rev. 01 — 20 May 2008
Access Value
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Access Value
R/W
R/W
Access Value
R/W
Access Value
R/W
R/W
R/W
R/W
0*
0*
1
0*
1
00*
0*
1
0*
0*
1
000*
0 0000* channel allocation I
04h*
0000*
0000*
69h*
78h*
Description
undefined
reset CTS
audio clock regeneration manual
undefined
layout
swap: for internal use
reset FIFO
Description
undefined
Description
latency read: latency value in audio FIFO
Description
undefined
CTS: audio clock recovery CTS value for
manual CTS settings
no specific action
reset CTS generation (soft reset)
automatic audio clock regeneration time
stamp generation
manual audio clock regeneration time stamp
generation
set layout 0
set layout 1
no specific action
reset audio FIFO
150 MHz pixel rate HDMI transmitter
2
S-bus port: layout 1
TDA9983B
© NXP B.V. 2008. All rights reserved.
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