adsp-21161n Analog Devices, Inc., adsp-21161n Datasheet - Page 51

• Manufacturer Part Number: adsp-21161n
• Description: Dsp Microcomputer
• Manufacturer: Analog Devices, Inc.

Output Drive Currents
Figure 37
of the ADSP-21161N. The curves represent the current drive
capability of the output drivers as a function of output voltage.
Test Conditions
The DSP is tested for output enable, disable, and hold time.
Output Enable Time
Output pins are considered to be enabled when they have made
a transition from a high impedance state to the point when they
start driving. The output enable time t
point when a reference signal reaches a high or low voltage level
to the point when the output has reached a specified high or low
trip point, as shown in the Output Enable/Disable diagram
(Figure
the measurement value is that of the first pin to start driving.
Output Disable Time
Output pins are considered to be disabled when they stop driving,
go into a high impedance state, and start to decay from their
output high or low voltage. The time for the voltage on the bus
to decay by V is dependent on the capacitive load, C
load current, I
following equation:
The output disable time t
and t
interval from when the reference signal switches to when the
output voltage decays V from the measured output high or
output low voltage. t
and with V equal to 0.5 V.
Example System Hold Time Calculation
To determine the data output hold time in a particular system,
first calculate t
to be the difference between the ADSP-21161N’s output voltage
REV. A
DECAY
–10
–20
–30
–40
–50
–60
–80
80
60
50
40
30
20
10
0
38). If multiple pins (such as the data bus) are enabled,
0
shows typical I-V characteristics for the output drivers
V
as shown in
DDEXT
Figure 37. Typical Drive Currents
L
DECAY
0.5
. This decay time can be approximated by the
= 3.47V, –40°C
V
V
DDEXT
t
DDEXT
DECAY
SWEEP (V
using the equation given above. Choose V
DECAY
1.0
= 3.47V, –40°C
Figure
= 3.3V, +25°C
DIS
V
is calculated with test loads C
DDEXT
=
DDEXT
1.5
is the difference between t
-------------------- -
38. The time t
C
V
= 3.13V, +105°C
) VOLTAGE – V
DDEXT
L
I
L
2.0
V
= 3.3V, +25°C
ENA
is the interval from the
2.5
V
DDEXT
MEASURED
3.0
= 3.13V, +105°C
is the
L
3.5
MEASURED
L
and the
and I
L
,
–51–
and the input threshold for the device requiring the hold time. A
typical V will be 0.4 V. C
line), and I
line). The hold time will be t
(i.e., t
REFERENCE
(MEASURED)
(MEASURED)
SIGNAL
Figure 40. Voltage Reference Levels for AC
Measurements (Except Output Enable/Disable)
DATRWH
V
V
OUTPUT
OUTPUT
Figure 39. 31Equivalent Device Loading for AC
Measurements (Includes All Fixtures)
OH
OL
t
INPUT
DIS
OR
PIN
TO
L
OUTPUT STOPS DRIVING
is the total leakage or three-state current (per data
for the write cycle).
Figure 38. Output Enable/Disable
1.5V
t
V
V
MEASURED
OH
OL
t
DECAY
VOLTAGE TO BE APPROXIMATELY 1.5V.
L
(MEASURED) + V
(MEASURED) – V
is the total bus capacitance (per data
DECAY
30pF
TEST CONDITIONS CAUSE THIS
HIGH IMPEDANCE STATE.
plus the minimum disable time
ADSP-21161N
50
t
ENA
OUTPUT STARTS DRIVING
2.0V
1.0V
1.5V
1.5V
(MEASURED)
(MEASURED)
V
V
OH
OL