ade7854 Analog Devices, Inc., ade7854 Datasheet - Page 12
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ade7854
Manufacturer Part Number
ade7854
Description
Poly Phase Multifunction Energy Metering Ic With Neutral Current Measurement
Manufacturer
Analog Devices, Inc.
Datasheet
1.ADE7854.pdf
(71 pages)
Available stocks
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Part Number
Manufacturer
Quantity
Price
Part Number:
ade7854ACPZ
Manufacturer:
ADI/亚德诺
Quantity:
20 000
ADE7854
18, 19,
22, 23
24
25
26
27
28
29,
32
33,34,35
36
37
38
39
VN, VCP,
VBP, VAP
AVDD
AGND
VDD
CLKIN
CLKOUT
CF1,CF2,CF3/HSCLK
SCLK/SCL
MISO/HSD
MOSI/SDA
IRQ
SS /HSA
0
,
IRQ
1
chip reference is enabled.
Analog Inputs for the Voltage Channel. This channel is used with the voltage transducer and
is referenced as the voltage channel in this document. These inputs are single-ended
voltage inputs with the maximum signal level of ±0.5 V with respect to VN for specified
operation. This channel has also an internal PGA.
This pin provides access to the on-chip 2.5V analog LDO. No external active circuitry should
be connected to this pin. This pin should be decoupled with a 4.7 μF capacitor in parallel
with a ceramic 100 nF capacitor.
This pin provides the ground reference for the analog circuitry in the ADE7854. This pin
should be tied to the analog ground plane or the quietest ground reference in the system.
This quiet ground reference should be used for all analog circuitry, for example, antialiasing
filters, current, and voltage transducers.
This pin provides the supply voltage for the ADE7854. In PSM0 (normal power mode) the
supply voltage should be maintained at 3.3 V ± 10% for specified operation. In PSM3 (sleep
mode), when the ADE7854 is supplied from a battery, the supply voltage should be
maintained between 2.4 and 3.7V. This pin should be decoupled to DGND with a 10 μF
capacitor in parallel with a ceramic 100 nF capacitor.
Master Clock for the ADE7854. An external clock can be provided at this logic input.
Alternatively, a parallel resonant AT crystal can be connected across CLKIN and CLKOUT to
provide a clock source for the ADE7854. The clock frequency for specified operation is
16.384 MHz. Ceramic load capacitors of a few tens of picofarad should be used with the gate
oscillator circuit. Refer to the crystal manufacturer’s data sheet for the load capacitance
requirements.
A crystal can be connected across this pin and CLKIN as previously described to provide a
clock source for the ADE7854. The CLKOUT pin can drive one CMOS load when either an
external clock is supplied at CLKIN or a crystal is being used.
Interrupt Request Outputs. These are active low logic outputs. See the Interrupts section for
a detailed presentation of the events that may trigger interrupts.
Calibration Frequency (CF) Logic Outputs. Provide power information based on CF1SEL,
CF2SEL, CF3SEL bits in CFMODE register. These outputs are used for operational and
calibration purposes. The full-scale output frequency can be scaled by writing to the
respectively CF1DEN, CF2DEN, CF3DEN registers (see the ENERGY to FREQUENCY
CONVERSION section). CF3 is multiplexed with the serial clock output of HSDC port.
Serial Clock Input for SPI port / Serial Clock Input for I
synchronized to this clock (see the Serial Interfaces section). This pin has a Schmidt-trigger
input for use with a clock source that has a slow edge transition time, for example, opto-
isolator outputs.
Data Out for SPI port / Data Out for HSDC port
Data In for SPI port / Data Out for I
Slave Select for SPI port / HSDC port active
Rev. PrC| Page 12 of 71
2
C port
Preliminary Technical Data
2
C port. All serial data transfers are