ade7854 Analog Devices, Inc., ade7854 Datasheet - Page 65

• Manufacturer Part Number: ade7854
• Description: Poly Phase Multifunction Energy Metering Ic With Neutral Current Measurement
• Manufacturer: Analog Devices, Inc.

Preliminary Technical Data
Table 34. CFMODE register (address 0xE610)
Bit
Location
2-0
5-3
8-6
9
10
11
12
13
14
15
Table 35. APHCAL, BPHCAL, CPHCAL registers (addresses 0xE614, 0xE615, 0xE616)
Bit
Location
4-0
6-5
8-7
9
15-10
Table 36. PHSIGN register (address 0xE617)
Bit
Location
0
1
Bit
Mnemonic
XPHCAL[4:0]
YPHCAL[1:0]
ZPHCAL[1:0]
VPHCAL
Reserved
Bit
Mnemonic
CF1SEL[2:0]
CF2SEL[2:0]
CF3SEL[2:0]
CF1DIS
CF2DIS
CF3DIS
CF1LATCH
CF2LATCH
CF3LATCH
Reserved
Bit
Mnemonic
AWSIGN
BWSIGN
Default
value
00000
00
00
0
000000
Default
value
000
000
000
1
1
1
0
0
0
0
0
0
Default
value
Description
These bits introduce a delay equal to XPHCAL cycles, i.e. a number between 0 and 31
These bits introduce a delay equal to YPHCAL*32+XPHCAL. If current channel compensation
(VPHCAL=0), YPHCAL can have any value between 0 and 3. If voltage channel compensation
(VPHCAL=1), YPHCAL can be maximum 1 and any number above it is considered equal to 1.
The number of cycles introduced as delay only for current channel is equal to ZPHCAL*128+
YPHCAL*32+XPHCAL. For current channel compensation, ZPHCAL can be maximum 2. ZPHCAL bits
are always considered 0 for voltage channel compensation.
-0: current channel compensation
-1: voltage channel compensation
These bits do not manage any functionality.
Description
-000: CF1 frequency proportional to the sum of total active powers on each phase identified by
bits 2-0 (TERMSEL1) in COMPMODE[15:0] register.
-001:if selected, CF1 pin is set low permanently.
-010: CF1 frequency proportional to the sum of apparent powers on each phase identified by bits
2-0 (TERMSEL1) in COMPMODE[15:0] register.
-011,100: if selected, CF1 pin is set low permanently.
-101,110,111: reserved. When set, the ADE7854 behave like CF1SEL [2:0]=000.
-000: CF2 frequency proportional to the sum of total active powers on each phase identified by
bits 5:3 (TERMSEL2) in COMPMODE[15:0] register.
-001: if selected, CF2 pin is set low permanently.
-010: CF2 frequency proportional to the sum of apparent powers on each phase identified by bits
5:3 (TERMSEL2) in COMPMODE[15:0] register.
-011,100: if selected, CF2 pin is set low permanently.
-100: if selected, CF2 pin is set low permanently.
-101,110,111: reserved. When set, the ADE7854 behaves like CF2SEL [2:0]=000.
-000: CF3 frequency proportional to the sum of total active powers on each phase identified by
bits 8:6 (TERMSEL3) in COMPMODE[15:0] register.
-001: if selected, CF3 pin is set low permanently.
-010: CF3 frequency proportional to the sum of apparent powers on each phase identified by bits
8:6 (TERMSEL3) in COMPMODE[15:0] register.
-011,100: if selected, CF3 pin is set low permanently.
-101,110,111: reserved. When set, the ADE7854 behaves like CF3SEL [2:0]=000.
When this bit is set to 1, the CF1 output is disabled. The respective digital to frequency converter
remains enabled even if CF1DIS=1. When set to 0, the CF1 output is enabled.
When this bit is set to 1, the CF2 output is disabled. The respective digital to frequency converter
remains enabled even if CF2DIS=1. When set to 0, the CF2 output is enabled.
When this bit is set to 1, the CF3 output is disabled. The respective digital to frequency converter
remains enabled even if CF3DIS=1. When set to 0, the CF3 output is enabled.
When this bit is set to 1, the content of the corresponding energy registers is latched when a CF1
pulse is generated. See Synchronizing energy registers with CFx outputs section.
When this bit is set to 1, the content of the corresponding energy registers is latched when a CF2
pulse is generated. See Synchronizing energy registers with CFx outputs section.
When this bit is set to 1, the content of the corresponding energy registers is latched when a CF3
pulse is generated. See Synchronizing energy registers with CFx outputs section.
This bit does not manage any functionality.
Description
-0: if total active power on phase A is positive.
-1: if total active power on phase A is negative.
-0: if total active power on phase B is positive.
Rev. PrC| Page 65 of 71
ADE7854