tspc106 ATMEL Corporation, tspc106 Datasheet - Page 21

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tspc106

Manufacturer Part Number
tspc106
Description
Ic Pci Mem Ctrlr 66mhz 303cbga
Manufacturer
ATMEL Corporation
Datasheet

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Figure 5. Exploded Cross-section
Internal Package Conduction
Resistance
Figure 6. C4/CBGA Package Mounted on a Printed Circuit Board
Note:
2102C–HIREL–01/05
Internal package resistance differs from external package resistance.
External Resistance
External Resistance
Internal Resistance
CI_CGA Package
After the C4 solder bump is reflowed, epoxy (encapsulant) is under-filled between the
die and the substrate. Under-fill material is commonly used on large high-power die;
however, this is not a requirement of the C4 technology. The package substrate is a
multilayer-co-fired ceramic. The package-to-board interconnection is via an array of
orthogonal 90/10 (lead/tin) solder balls on 1.27 mm pitch. During assembly of the
C4/CBGA package to the board, the high-melt balls do not collapse.
For the C4/CBGA packaging technology, the intrinsic conduction thermal resistance
paths are as follows:
These parameters are shown in Table 12. In the C4/CBGA package, the silicon chip is
exposed; therefore, the package case is the top of the silicon.
Table 12. Thermal Resistance
Figure 6 shows a simplified thermal network in which a C4/CBGA package is mounted
on a printed-circuit board.
Thermal Metric
Junction-to-case thermal resistance
Junction-to-lead (ball) thermal resistance
Junction-to-lead (column) thermal resistance
the die junction-to-case thermal resistance
the die junction-to-lead thermal resistance
Printed Circuit Board
Heat Sink
Chip with C4 Encapsulant
Printed Circuit Board
Ceramic Substrate
BGA Joint
Radiation
Radiation
Convection
Convection
Effective Thermal Resistance
0.133°C/W
3.8°C/W (CBGA package)
4.0°C/W (CI_CGA package)
Thermal Interface Material
Die/Package
Die Junction
Package/Leads
CBGA Package
21

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