tspc106 ATMEL Corporation, tspc106 Datasheet - Page 8

• Manufacturer Part Number: tspc106
• Description: Ic Pci Mem Ctrlr 66mhz 303cbga
• Manufacturer: ATMEL Corporation

Table 1. TSPC106 Pinout in 303-ball CBGA Package (Continued)
Notes:
Signal Description
8
Signal Name
TCK
TDI
TDO
TMS
TRST
Power and Ground Signals
AV
LSSD_MODE
V
V
NC
DD
SS
DD
1. Some signals have dual functions and are shown more than once in this table.
2. All PCI signals are in little-endian bit order.
3. This test signal is for factory use only. It must be pulled up to V
TSPC106A
(3)
Pin Number
F13
B13
E12
D14
H13
K9
G11
E10, E6, F11, F5, F7, G10, G12, G6, H5, H7, K10, K7, L12, M11, M5,
M7, N10, N12, N6, P11, P5, P7, R10, R6, J8, L8
E11, E7, F10, F12, F6, G5, G7, H12, H6, J7, L7, M10, M12, M6, N11, N5,
N7, P10, P12, P6, R11, R7, K8, J9, L9
H8, H9, M8, M9
The signals on the TSPC106 are grouped as follows:
•
•
•
•
•
•
•
Note:
60x processor interface signals
L2 cache/multiple processor interface signals
Memory interface signals
PCI interface signals
Interrupt, clock and power management signals
IEEE 1149.1 interface signals
Configuration signals
A bar over a signal name indicates that the signal is active low, for example, address retry
(ARTRY) and transfer start (TS). Active-low signals are referred to as asserted (active)
when they are low and negated when they are high. Signals that are not active low such
as tag valid (TV) and nonmaskable interrupt (NMI) are referred to as asserted when they
are high and negated when they are low.
For multiple-function signals, outlined signal names refer to the alternate function(s) of
the signal being described. For example, the L2 controller signal, (tag output enable
TOE), has the alternate function data bus grant 1 (DBG1) when the TSPC106 is config-
ured for a second 60x processor.
DD
for normal device operation.
Active
Clock
High
High
High
High
High
Low
Low
Low
–
2102C–HIREL–01/05
Ground
Output
Power
Clock
Input
Input
Input
Input
Input
I/O
–