hd64338023s Renesas Electronics Corporation., hd64338023s Datasheet - Page 126

• Manufacturer Part Number: hd64338023s
• Description: Renesas 8-bit Single-chip Microcomputer Super Low Power Series
• Manufacturer: Renesas Electronics Corporation.

Section 3 Exception Handling
Bit 1—Timer C Interrupt Enable (IENTC)
Bit 1 enables or disables timer C overflow and underflow interrupt requests.
Bit 1
IENTC
0
1
Bit 0—Asynchronous Event Counter Interrupt Enable (IENEC)
Bit 0 enables or disables asynchronous event counter interrupt requests.
Bit 0
IENEC
0
1
For details of SCI3 interrupt control, see section 10.2.6 Serial control register 3 (SCR3).
Interrupt Request Register 1 (IRR1)
IRR1 is an 8-bit read/write register, in which a corresponding flag is set to 1 when a timer A,
IRQAEC, IRQ
automatically when an interrupt is accepted. It is necessary to write 0 to clear each flag.
Rev. 7.00 Mar 10, 2005 page 84 of 652
REJ09B0042-0700
Bit
Initial value
Read/Write
Note: * Only a write of 0 for flag clearing is possible
Description
Disables timer C interrupt requests
Enables timer C interrupt requests
Description
Disables asynchronous event counter interrupt requests
Enables asynchronous event counter interrupt requests
4
, IRQ
R/(W) *
IRRTA
7
0
3
, IRQ
1
, or IRQ


W
6
0
interrupt is requested. The flags are not cleared


5
1
IRRI4
R/(W) *
4
0
IRRI3
R/(W) *
3
0
IRREC2
R/(W) *
2
0
R/(W) *
IRRI1
1
0
(initial value)
(initial value)
R/(W) *
IRRI0
0
0