hd64338023s Renesas Electronics Corporation., hd64338023s Datasheet - Page 485

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hd64338023s

Manufacturer Part Number
hd64338023s
Description
Renesas 8-bit Single-chip Microcomputer Super Low Power Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
14.3
14.3.1
Figure 14.2 shows the timing of the operation of the power-on reset circuit. As the power-supply
voltage rises, the capacitor which is externally connected to the
the on-chip pull-up resistor (typ. 100 kΩ). Since the state of the
chip, the prescaler S and the entire chip are in their reset states. When the level on the
reaches the specified value, the prescaler S is released from its reset state and it starts counting.
The OVF signal is generated to release the internal reset signal after the prescaler S has counted
131,072 clock (φ) cycles. The noise cancellation circuit of approximately 100 ns is incorporated to
prevent the incorrect operation of the chip by noise on the
To achieve stable operation of this LSI, the power supply needs to rise to its full level and settles
within the specified time. The maximum time required for the power supply to rise and settle after
power has been supplied (t
which is connected to
supply voltage, the power supply circuit should be designed to satisfy the following formula.
Note that the power supply voltage (Vcc) must fall below Vpor = 100 mV and rise after charge on
the
should be placed near Vcc. If the power supply voltage (Vcc) rises from the point above Vpor, a
power-on reset may not occur.
R E S
pin is removed. To remove charge on the
Power-On Reset Circuit
t
PWON
Operation
Section 14 Power-On Reset and Low-Voltage Detection Circuits (H8/38124 Group Only)
(t
PWON
(ms) ≤ 80 • C
≤ 3000 ms, C
R E S
PWON
pin (C
R E S
(µF) ± 10/f
) is determined by the oscillation frequency (f
R E S
R E S
≥ 0.22 µF, and f
) . If t
OSC
PWON
(MHz)
means the time required to reach 90 % of power
R E S
OSC
pin, it is recommended that the diode
= 10 in 2-MHz to 10-MHz operation)
Rev. 7.00 Mar 10, 2005 page 443 of 652
R E S
pin.
R E S
R E S
pin is gradually charged via
pin is transmitted within the
OSC
REJ09B0042-0700
) and capacitance
R E S
pin

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