hd64338023s Renesas Electronics Corporation., hd64338023s Datasheet - Page 381
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hd64338023s
Manufacturer Part Number
hd64338023s
Description
Renesas 8-bit Single-chip Microcomputer Super Low Power Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.HD64338023S.pdf
(697 pages)
- Current page: 381 of 697
- Download datasheet (6Mb)
Bit 3—Stop Bit Length (STOP)
Bit 3 selects 1 bit or 2 bits as the stop bit length in asynchronous mode. The STOP bit setting is
only valid in asynchronous mode. When synchronous mode is selected the STOP bit setting is
invalid since stop bits are not added.
Bit 3
STOP
0
1
Notes: 1. In transmission, a single 1 bit (stop bit) is added at the end of a transmit character.
In reception, only the first of the received stop bits is checked, irrespective of the STOP bit setting.
If the second stop bit is 1 it is treated as a stop bit, but if 0, it is treated as the start bit of the next
transmit character.
Bit 2—Multiprocessor Mode (MP)
Bit 2 enables or disables the multiprocessor communication function. When the multiprocessor
communication function is enabled, the parity settings in the PE and PM bits are invalid. The MP
bit setting is only valid in asynchronous mode. When synchronous mode is selected the MP bit
should be set to 0. For details on the multiprocessor communication function, see section 10.3.4,
Multiprocessor Communication Function.
Bit 2
MP
0
1
Note: * For the case where 5-bit data is selected, see table 10.11.
2. In transmission, two 1 bits (stop bits) are added at the end of a transmit character.
Description
1 stop bit *
2 stop bits *
Description
Multiprocessor communication function disabled *
Multiprocessor communication function enabled *
1
2
Section 10 Serial Communication Interface
Rev. 7.00 Mar 10, 2005 page 339 of 652
REJ09B0042-0700
(initial value)
(initial value)
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