hd64338023s Renesas Electronics Corporation., hd64338023s Datasheet - Page 428

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hd64338023s

Manufacturer Part Number
hd64338023s
Description
Renesas 8-bit Single-chip Microcomputer Super Low Power Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
Section 10 Serial Communication Interface
Consequently, the receive margin in asynchronous mode can be expressed as shown in equation
(1).
Substituting 0 for F (absolute value of clock frequency deviation) and 0.5 for D (clock duty) in
equation (1), a receive margin of 46.875% is given by equation (2).
However, this is only a computed value, and a margin of 20% to 30% should be allowed when
carrying out system design.
Rev. 7.00 Mar 10, 2005 page 386 of 652
REJ09B0042-0700
Internal
basic clock
Receive data
(RXD32)
Synchronization
sampling timing
Data sampling
timing
M ={(0.5 –
where
When D = 0.5 and F = 0,
M = {0.5 – 1/(2 × 16)} • 100 [%]
= 46.875%
Figure 10.21 Receive Data Sampling Timing in Asynchronous Mode
M: Receive margin (%)
N: Ratio of bit rate to clock (N = 16)
D: Clock duty (D = 0.5 to 1.0)
L: Frame length (L = 9 to 12)
F: Absolute value of clock frequency deviation
2N
1
0
8 clock pulses
Start bit
) –
D – 0.5
N
16 clock pulses
7
– (L – 0.5) F} • 100 [%]
15 0
D0
.... Equation (2)
..... Equation (1)
7
15 0
D1

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