m58bw32f STMicroelectronics, m58bw32f Datasheet - Page 35

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m58bw32f

Manufacturer Part Number
m58bw32f
Description
16 Or 32 Mbit X32, Boot Block, Burst 3.3v Supply Flash Memories
Manufacturer
STMicroelectronics
Datasheet

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M58BW16F, M58BW32F
4.7
4.8
Erase All Main Blocks command
The Erase All Main Blocks command is used to erase all 63 main blocks, without affecting
the parameter blocks.
Issuing the Erase All Main Blocks command sets every bit in each main block to '1'. All data
previously stored in the main blocks are lost.
Two Bus Write cycles are required to issue the Erase All Main Blocks command. The first
cycle sets up the command, the second cycle confirms the command and starts the
Program/Erase controller. If the Confirm command is not given the sequence is aborted,
and Status Register bits 4 and 5 are set to '1'.
If the address given in the second cycle is located in a protected block, the Erase All Main
Blocks operation aborts. The data remains unchanged in all blocks and the Status Register
outputs the error.
Once the Erase All Main Blocks command has been issued, subsequent Bus Read
operations output the Status Register. See the
During an Erase All Main Blocks operation, only the Read Status Register command is
accepted by the memory; any other command are ignored. Erase All Main Blocks, once
started, cannot be suspended.
If PEN is at V
aborts and the Status Register PEN bit (bit 3) is set to '1'.
Program command
The Program command is used to program the memory array. Two Bus Write operations are
required to issue the command; the first write cycle sets up the Program command, the
second write cycle latches the address and data to be programmed and starts the
Program/Erase controller. A program operation can be aborted by writing FFFFFFFFh to
any address after the program set-up command has been given.
The Program command is also used to program the OTP block. Refer to
Commands, for details of the address.
Once the command is issued subsequent Bus Read operations read the Status Register.
See the section on the Status Register for details on the definitions of the Status Register
bits. During the Program operation the memory will only accept the Read Status Register
command and the Program/Erase Suspend command. All other commands will be ignored.
If Reset/Power-down, RP, falls to V
If PEN is at V
aborts, the PEN Status bit in the Status Register is set to ‘1’ and the command must be re-
issued.
See
on using the Program command.
Appendix
IH
IH
A,
, the operation will be performed. If PEN is lower than V
, the operation can be performed. If PEN goes below V
Figure 26: Program flowchart and
IL
during programming the operation will be aborted.
Status Register
pseudocode, for a suggested flowchart
section for details.
IH,
Command interface
IH
Table 10:
the operation
the operation
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