tmp88ch40img TOSHIBA Semiconductor CORPORATION, tmp88ch40img Datasheet - Page 21
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tmp88ch40img
Manufacturer Part Number
tmp88ch40img
Description
8 Bit Microcontroller
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet
1.TMP88CH40IMG.pdf
(148 pages)
- Current page: 21 of 148
- Download datasheet (2Mb)
System Control Register 2
SYSCR2
(0039H)
2.1.4.4
Note 1: Be sure to set "1" to SYSCR2 Register bit7. When it is cleared to 0, the device is reset.
Note 2: WDT: Watchdog Timer, *: Don’t care
Note 3: Be sure to write "0" to SYSCR2 Register bit6 and bit5.
Note 4: The values of the SYSCR2 Register bits 3 to 0 are indeterminate when read.
Example :Placing the device in IDLE mode
7
1
IDLE
Controlling Operation Modes
(1)
ing IDLE mode, the device retains the following state.
IDLE mode
IDLE mode is controlled by System Control Register 2 (SYSCR2) and a maskable interrupt. Dur-
6
0
Place the device in IDLE mode
1. The CPU and watchdog timer stop operating.
2. The data memory, register, program status word, and port output latch hold the state in
3. The program counter holds the instruction address two instructions ahead the one that
which they were immediately before entering IDLE mode.
placed the device in IDLE mode.
The peripheral hardware continues operating.
SET
5
0
IDLE
(SYSCR2) . 4
4
0: Keep the CPU and WDT operating
1: Stop the CPU and WDT (IDLE mode entered)
3
Page 13
2
1
0
(Initial value: 1000 ****)
TMP88CH40IMG
R/W
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