tmp88ch40img TOSHIBA Semiconductor CORPORATION, tmp88ch40img Datasheet - Page 37

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tmp88ch40img

Manufacturer Part Number
tmp88ch40img
Description
8 Bit Microcontroller
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet
3.5 External Interrupts
Source
External Interrupt Control Register
INT0
EINTCR
(0037H)
(Pulse inputs of less than a certain time are eliminated as noise).
ured as an input port during reset.
(EINTCR).
The TMP88CH40IMG has 1 external interrupt inputs. These inputs are equipped with digital noise reject circuits
The
Noise reject control and
Note 1: When EINTCR<INT0EN> = "0", IL3 is not set even if a falling edge is detected on the
Note 2: When a pin with more than one function is used as an output and a change occurs in data or input/output status, an inter-
Note 1: fc: High-frequency clock [Hz], *: Don’t care
Note 2: When the external interrupt control register (EINTCR) is overwritten,the noise canceller may not operate normally. It is rec-
INT0
rupt request signal is generated in a pseudo manner. In this case, it is necessary to perform appropriate processing such
as disabling the interrupt enable flag.
ommended that external interrupts are disabled using the interrupt enable register (EIR).
INT0
Pin
7
/P10 pin can be configured as either an external interrupt input pin or an input/output port, and is config-
INT0EN
INT0EN
6
Sub-Pin
P10
INT0
P10/
5
/P10 pin function selection are performed by the external interrupt control register
INT0
IMF EF3 INT0EN=1
Enable Conditions
pin configuration
4
3
Page 29
0: P10 input/output port
1:
Falling edge
INT0
Release Edge (level)
2
pin (Port P10 should be set to an input mode)
1
Pulses of less than 2/fc [s] are eliminated as
noise. Pulses of 6/fc [s] or more are considered
to be signals. (at CGCR<DV1CK>=0).
0
(Initial value: *0** ****)
INT0
Digital Noise Reject
pin input.
TMP88CH40IMG
R/W

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