tmp88ch40img TOSHIBA Semiconductor CORPORATION, tmp88ch40img Datasheet - Page 58
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tmp88ch40img
Manufacturer Part Number
tmp88ch40img
Description
8 Bit Microcontroller
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet
1.TMP88CH40IMG.pdf
(148 pages)
- Current page: 58 of 148
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8.2 TimerCounter Control
8. 16-Bit TimerCounter 1 (TC1)
ACAP1
TC1CK
TC1M
TC1S
Note 1: fc: High-frequency clock [Hz]
Note 2: The timer register consists of two shift registers. A value set in the timer register becomes valid at the rising edge of the
Note 3: To set the mode and source clock, write to TC1CR during TC1CR<TC1S>=00.
Note 4: To set the timer registers, the following relationship must be satisfied.
Note 5: Set TC1CR Register bit7 to “0”.
Note 6: Use the auto-capture function in the operative condition of TC1. A captured value may not be fixed if it's read after the
Note 7: Since the up-counter value is captured into TC1DRB by the source clock of up-counter after setting TC1CR<ACAP1> to
Auto capture control
TC1 start control
TC1 source clock select
[Hz]
TC1 operating mode
select
first source clock pulse that occurs after the upper byte (TC1DRAH and TC1DRBH) is written. Therefore, write the lower
byte and the upper byte in this order (it is recommended to write the register with a 16-bit access instruction). Writing only
the lower byte (TC1DRAL) does not enable the setting of the timer register.
TC1DRA > 1
execution of the timer stop or auto-capture disable. Read the capture value in a capture enabled condition.
"1". Therefore, to read the captured value, wait at least one cycle of the internal source clock before reading TC1DRB for
the first time.
0:Auto-capture disable
00: Stop and counter clear
01: Command start
10: Reserved
11: Reserved
00: Timer mode
01: Reserved
10: Reserved
11: Reserved
00
01
10
11
DV1CK = 0
Page 50
fc/2
fc/2
fc/2
11
7
3
NORMAL, IDLE mode
Reserved
1:Auto-capture enable
DV1CK = 1
fc/2
fc/2
fc/2
12
8
4
TMP88CH40IMG
R/W
R/W
R/W
R/W
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