tmp88ch41ug TOSHIBA Semiconductor CORPORATION, tmp88ch41ug Datasheet - Page 128
tmp88ch41ug
Manufacturer Part Number
tmp88ch41ug
Description
8 Bit Microcontroller Tlcs-870/x Series
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet
1.TMP88CH41UG.pdf
(240 pages)
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driver)
14. Motor Control Circuit (PMD: Programmable motor
14.4.1 Configuration of the Timer Unit
controlled by timer control registers and timer compare registers.
The timer unit consists mainly of a mode timer, three timer comparator, and mode capture register, and is
• The mode timer can be reset by a signal from the position detection circuit, Timer 3, or overload pro-
• The value of the mode timer during counting can be read by capturing the count in software and read-
• Timer 1 and Timers 2 and 3 generate an interrupt signal by magnitude comparison and matching com-
• When any one of Timers 1 to 3 interrupts occurs, the next interrupts can be enabled by writing a new
• When capturing by position detection is enabled, the capture register has the timer value captured in it
tective circuit. If the mode timer overflows without being reset, it stops at FFFFH and sets an overflow
flag in the control register.
ing the capture register.
parison, respectively. Therefore, Timer 1 can generate an interrupt signal even when it could not write
to the compare register in time and the counter value at the time of writing happens to exceed the regis-
ter’s set value.
value to the respective compare registers (CMP1, CMP2, CMP3).
each time position is detected. In this way, the capture register always holds the latest value.
Page 118
TMP88FH41UG
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