tmp88ch41ug TOSHIBA Semiconductor CORPORATION, tmp88ch41ug Datasheet - Page 21
tmp88ch41ug
Manufacturer Part Number
tmp88ch41ug
Description
8 Bit Microcontroller Tlcs-870/x Series
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet
1.TMP88CH41UG.pdf
(240 pages)
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tmp88ch41ug-7B64(JOA)
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Main system clock
Divider Control Register
Timing Generator Control Register
(0030H)
(0036H)
TBTCR
CGCR
Note 1: fc: the high-frequency clock [Hz], *: Don’t care
Note 2: The CGCR Register bits 4 and 3 show an indeterminate value when read.
Note 3: Be sure to write “0” to CGCR Register bits 7, 6, 2, 1 and 0.
Note 1: Be sure to write "0" to TBTCR Register bit 4.
States
DVOEN
DV1CK
7
0
7
(2)
series has 15 types of instructions, from 1-cycle instructions which are executed in one machine
cycle up to 15-cycle instructions that require a maximum of 15 machine cycles.
clock cycle.
Machine cycle
Instruction execution and the internal hardware operations are synchronized to the system clocks.
The minimum unit of instruction execution is referred to as the “machine cycle”. The TLCS-870/X
A machine cycle consists of four states (S0 to S3), with each state comprised of one main system
1/fc
S0
6
0
6
Selects input clock to the first
divider stage
DVOCK
DV1CK
(0.20 µs at 20 MHz)
5
5
S1
Machine cycle
Figure 2-5 Machine Cycles
4
4
0
S2
TBTEN
0: fc/4
1: fc/8
3
3
Page 11
S3
2
0
2
TBTCK
S0
1
0
1
0
0
0
S1
(Initial value: 000* *000)
(Initial value: 0000 0000)
S2
S3
TMP88FH41UG
R/W
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