tmp88ch41ug TOSHIBA Semiconductor CORPORATION, tmp88ch41ug Datasheet - Page 82

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tmp88ch41ug

Manufacturer Part Number
tmp88ch41ug
Description
8 Bit Microcontroller Tlcs-870/x Series
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet

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10.3 Function
10. 16-Bit TimerCounter 1 (TC1)
TC1 pin Input
Up-counter
TC1DRA
INTTC1
interrput request
10.3.3 Event Counter Mode
rising or falling edge of the input pulse is selected as the count up edge in TC1CR<TC1S>.
and the up-counter is cleared. After being cleared, the up-counter restarts counting at each edge of the input
pulse to the TC1 pin. Since a match between the up-counter and the value set to TC1DRA is detected at the
edge opposite to the selected edge, an INTTC1 interrupt request is generated after a match of the value at the
edge opposite to the selected edge.
Use the auto-capture function in the operative condition of TC1. A captured value may not be fixed if it's read
after the execution of the timer stop or auto-capture disable. Read the capture value in a capture enabled condi-
tion. Since the up-counter value is captured into TC1DRB by the source clock of up-counter after setting
TC1CR<ACAP1> to "1". Therefore, to read the captured value, wait at least one cycle of the internal source
clock before reading TC1DRB for the first time.
In the event counter mode, the up-counter counts up at the edge of the input pulse to the TC1 pin. Either the
When a match between the up-counter and the TC1DRA value is detected, an INTTC1 interrupt is generated
Two or more machine cycles are required for the low-or high-level pulse input to the TC1 pin.
Setting TC1CR<ACAP1> to “1” captures the up-counter value into TC1DRB with the auto capture function.
?
Timer start
0
Figure 10-4 Event Counter Mode Timing Chart
n
Table 10-2 Input Pulth Width to TC1 Pin
1
High-going
Low-going
2
Page 72
Minimum Pulse Width [s]
NORMAL, IDLE Mode
Match detect
n − 1
2
2
3
3
/fc
/fc
n
0
Counter clear
1
2
TMP88FH41UG
(TC1S = 10)
At the
rising edge

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