tmp88ch41ug TOSHIBA Semiconductor CORPORATION, tmp88ch41ug Datasheet - Page 65

• Manufacturer Part Number: tmp88ch41ug
• Description: 8 Bit Microcontroller Tlcs-870/x Series
• Manufacturer: TOSHIBA Semiconductor CORPORATION

8. Time Base Timer (TBT) and Divider Output (
Example :Set the time base timer frequency to fc/2
8.1 Time Base Timer
timer interrupt (INTTBT).
put of the timing generator which is selected by TBTCK. ) after time base timer has been enabled.
interrupt period ( Figure 8-2 ).
rupt frequency must not be changed with the disble from the enable state.) Both frequency selection and enabling can
be performed simultaneously.
The time base timer generates time base for key scanning, dynamic displaying, etc. It also provides a time base
An INTTBT ( Time Base Timer Interrupt ) is generated on the first falling edge of source clock ( The divider out-
The divider is not cleared by the program; therefore, only the first interrupt may be generated ahead of the set
The interrupt frequency (TBTCK) must be selected with the time base timer disabled (TBTEN="0"). (The inter-
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
23
21
16
14
13
12
11
9
,fc/2
,fc/2
,fc/2
,fc/2
,fc/2
,fc/2
,fc/2
,fc/2
24
22
17
15
14
13
12
10
Source clock
TBTCR<TBTEN>
INTTBT
interrupt request
TBTCK
LD
LD
DI
SET
EI
Time base timer control register
Figure 8-1 Time Base Timer configuration
MPX
3
Figure 8-2 Time Base Timer Interrupt
(TBTCR) , 00000010B
(TBTCR) , 00001010B
(EIRL) . 6
TBTCR
Source clock
Enable TBT
16
[Hz] and enable an INTTBT interrupt.
TBTEN
Falling edge
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detector
Interrupt period
; TBTCK ← 010 (Freq. set)
; TBTEN ← 1 (TBT enable)
DVO
INTTBT
interrupt request
)
TMP88FH41UG