atmega32u4-16mu ATMEL Corporation, atmega32u4-16mu Datasheet - Page 117
atmega32u4-16mu
Manufacturer Part Number
atmega32u4-16mu
Description
Atmega32u4 8-bit Avr Microcontroller With 32k Bytes Of Isp Flash And Usb Controller
Manufacturer
ATMEL Corporation
Datasheet
1.ATMEGA32U4-16MU.pdf
(431 pages)
- Current page: 117 of 431
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14.7.1
7766A–AVR–03/08
Compare Output Mode and Waveform Generation
Secondly the COMnx1:0 bits control the OCnx pin output source.
schematic of the logic affected by the COMnx1:0 bit setting. The I/O Registers, I/O bits, and I/O
pins in the figure are shown in bold. Only the parts of the general I/O Port Control Registers
(DDR and PORT) that are affected by the COMnx1:0 bits are shown. When referring to the
OCnx state, the reference is for the internal OCnx Register, not the OCnx pin. If a system reset
occur, the OCnx Register is reset to “0”.
Figure 14-5. Compare Match Output Unit, Schematic
The general I/O port function is overridden by the Output Compare (OCnx) from the Waveform
Generator if either of the COMnx1:0 bits are set. However, the OCnx pin direction (input or out-
put) is still controlled by the Data Direction Register (DDR) for the port pin. The Data Direction
Register bit for the OCnx pin (DDR_OCnx) must be set as output before the OCnx value is visi-
ble on the pin. The port override function is generally independent of the Waveform Generation
mode, but there are some exceptions. Refer to
details.
The design of the Output Compare pin logic allows initialization of the OCnx state before the out-
put is enabled. Note that some COMnx1:0 bit settings are reserved for certain modes of
operation.
The COMnx1:0 bits have no effect on the Input Capture unit.
The Waveform Generator uses the COMnx1:0 bits differently in normal, CTC, and PWM modes.
For all modes, setting the COMnx1:0 = 0 tells the Waveform Generator that no action on the
OCnx Register is to be performed on the next compare match. For compare output actions in the
non-PWM modes refer to
page
page
129, and for phase correct and phase and frequency correct PWM refer to
130.
COMnx1
COMnx0
FOCnx
clk
I/O
See “16-bit Timers/Counters (Timer/Counter1 and Timer/Counter3)” on page 106.
Waveform
Generator
Table 14-1 on page
D
D
PORT
D
DDR
OCnx
129. For fast PWM mode refer to
Q
Q
Q
Table
14-1,
1
0
Table 14-2
Figure 14-5
ATmega32U4
and
shows a simplified
Table 14-3
Table 14-2 on
Table 14-3 on
OCnx
Pin
117
for
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