atmega32u4-16mu ATMEL Corporation, atmega32u4-16mu Datasheet - Page 191

• Manufacturer Part Number: atmega32u4-16mu
• Description: Atmega32u4 8-bit Avr Microcontroller With 32k Bytes Of Isp Flash And Usb Controller
• Manufacturer: ATMEL Corporation

16.12.11 OCR4D – Timer/Counter4 Output Compare Register D
16.12.12 TIMSK4 – Timer/Counter4 Interrupt Mask Register
7766A–AVR–03/08
The output compare register C is an 8-bit read/write register.
The Timer/Counter Output Compare Register C contains data to be continuously compared with
Timer/Counter4, and a compare match will clear TCNT4. This register has the same function in
Normal mode and PWM modes.
Note that, if a smaller value than three is written to the Output Compare Register C, the value is
automatically replaced by three as it is a minimum value allowed to be written to this register.
Note that, if 10-bit accuracy is used special procedures must be followed when accessing the
internal 10-bit Output Compare Registers via the 8-bit AVR data bus. These procedures are
described in section
The output compare register D is an 8-bit read/write register.
The Timer/Counter Output Compare Register D contains data to be continuously compared with
Timer/Counter4. Actions on compare matches are specified in TCCR4A. A compare match does
only occur if Timer/Counter4 counts to the OCR4D value. A software write that sets TCNT4 and
OCR4D to the same value does not generate a compare match.
A compare match will set the compare interrupt flag OCF4D after a synchronization delay follow-
ing the compare event.
Note that, if 10-bit accuracy is used special procedures must be followed when accessing the
internal 10-bit Output Compare Registers via the 8-bit AVR data bus. These procedures are
described in section
• Bit 7- OCIE4D: Timer/Counter4 Output Compare Interrupt Enable
When the OCIE4D bit is set (one) and the I-bit in the Status Register is set (one), the
Timer/Counter4 Compare Match D interrupt is enabled. The corresponding interrupt at vector
$010 is executed if a compare match D occurs. The Compare Flag in Timer/Counter4 is set
(one) in the Timer/Counter Interrupt Flag Register.
• Bit 6 - OCIE4A: Timer/Counter4 Output Compare Interrupt Enable
When the OCIE4A bit is set (one) and the I-bit in the Status Register is set (one), the
Timer/Counter4 Compare Match A interrupt is enabled. The corresponding interrupt at vector
$003 is executed if a compare match A occurs. The Compare Flag in Timer/Counter4 is set
(one) in the Timer/Counter Interrupt Flag Register.
• Bit 5 - OCIE4B: Timer/Counter4 Output Compare Interrupt Enable
Bit
Read/Write
Initial value
Bit
Read/Write
Initial value
OCIE4D
MSB
R/W
R/W
7
0
7
0
“Accessing 10-Bit Registers” on page
“Accessing 10-Bit Registers” on page
OCIE4A
R/W
R/W
6
0
6
0
OCIE4B
R/W
R/W
5
0
5
0
R/W
R/W
4
0
4
0
R/W
R/W
3
0
3
0
178.
178.
TOIE4
R/W
R/W
2
0
2
0
ATmega32U4
R/W
R/W
1
0
1
0
LSB
R/W
R/W
0
0
0
0
TIMSK4
OCR4D
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