atmega32u4-16mu ATMEL Corporation, atmega32u4-16mu Datasheet - Page 190

• Manufacturer Part Number: atmega32u4-16mu
• Description: Atmega32u4 8-bit Avr Microcontroller With 32k Bytes Of Isp Flash And Usb Controller
• Manufacturer: ATMEL Corporation

16.12.8
16.12.9
16.12.10 OCR4C – Timer/Counter4 Output Compare Register C
190
ATmega32U4
OCR4A – Timer/Counter4 Output Compare Register A
OCR4B – Timer/Counter4 Output Compare Register B
• Bits 1:0 - TC49, TC48: Two MSB bits of the 10-bit accesses
If 10-bit accuracy is used, the Timer/Counter4 High Byte Register (TC4H) is used for temporary
storing the MSB bits (TC49, TC48) of the 10-bit accesses. The same TC4H register is shared
between all 10-bit registers within the Timer/Counter4. Note that special procedures must be fol-
lowed when accessing the 10-bit TCNT4 register via the 8-bit AVR data bus. These procedures
are described in section
The output compare register A is an 8-bit read/write register.
The Timer/Counter Output Compare Register A contains data to be continuously compared with
Timer/Counter4. Actions on compare matches are specified in TCCR4A. A compare match does
only occur if Timer/Counter4 counts to the OCR4A value. A software write that sets TCNT4 and
OCR4A to the same value does not generate a compare match.
A compare match will set the compare interrupt flag OCF4A after a synchronization delay follow-
ing the compare event.
Note that, if 10-bit accuracy is used special procedures must be followed when accessing the
internal 10-bit Output Compare Registers via the 8-bit AVR data bus. These procedures are
described in section
The output compare register B is an 8-bit read/write register.
The Timer/Counter Output Compare Register B contains data to be continuously compared with
Timer/Counter4. Actions on compare matches are specified in TCCR4. A compare match does
only occur if Timer/Counter4 counts to the OCR4B value. A software write that sets TCNT4 and
OCR4B to the same value does not generate a compare match.
A compare match will set the compare interrupt flag OCF4B after a synchronization delay follow-
ing the compare event.
Note that, if 10-bit accuracy is used special procedures must be followed when accessing the
internal 10-bit Output Compare Registers via the 8-bit AVR data bus. These procedures are
described in section
Bit
Read/Write
Initial value
Bit
Read/Write
Initial value
Bit
Read/Write
Initial value
MSB
MSB
MSB
R/W
R/W
R/W
7
0
7
0
7
1
“Accessing 10-Bit Registers” on page
“Accessing 10-Bit Registers” on page
“Accessing 10-Bit Registers” on page
R/W
R/W
R/W
6
0
6
0
6
1
R/W
R/W
R/W
5
0
5
0
5
1
R/W
R/W
R/W
4
0
4
0
4
1
R/W
R/W
R/W
3
0
3
0
3
1
178.
178.
R/W
R/W
R/W
178.
2
0
2
0
2
1
R/W
R/W
R/W
1
0
1
0
1
1
LSB
LSB
LSB
R/W
R/W
R/W
0
0
0
0
0
1
7766A–AVR–03/08
OCR44C
OCR4A
OCR4B