atmega32u4-16mu ATMEL Corporation, atmega32u4-16mu Datasheet - Page 28

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atmega32u4-16mu

Manufacturer Part Number
atmega32u4-16mu
Description
Atmega32u4 8-bit Avr Microcontroller With 32k Bytes Of Isp Flash And Usb Controller
Manufacturer
ATMEL Corporation
Datasheet
6.2.1
6.2.2
6.3
28
Low Power Crystal Oscillator
ATmega32U4
Default Clock Source
Clock Startup Sequence
The device is shipped with Low Power Crystal Oscillator (8.0MHz-max) enabled and with the
fuse CKDIV8 programmed, resulting in 1.0MHz system clock (with a 8 MHz crystal). The default
fuse configuration is CKSEL[3:0] = "1111", SUT = "10", CKDIV8 = "0". This default setting
ensures that all users can make their desired clock source setting using any available program-
ming interface.
Any clock source needs a sufficient V
cycles before it can be considered stable.
To ensure sufficient V
the device reset is released by all other reset sources.
describes the start conditions for the internal reset. The delay (t
Oscillator and the number of cycles in the delay is set by the SUTx and CKSELx fuse bits. The
selectable delays are shown in
dependent as shown in
Table 6-2.
Main purpose of the delay is to keep the AVR in reset until it is supplied with minimum Vcc. The
delay will not monitor the actual voltage and it will be required to select a delay longer than the
Vcc rise time. If this is not possible, an internal or external Brown-Out Detection circuit should be
used. A BOD circuit will ensure sufficient Vcc before it releases the reset, and the time-out delay
can be disabled. Disabling the time-out delay without utilizing a Brown-Out Detection circuit is
not recommended.
The oscillator is required to oscillate for a minimum number of cycles before the clock is consid-
ered stable. An internal ripple counter monitors the oscillator output clock, and keeps the internal
reset active for a given number of clock cycles. The reset is then released and the device will
start to execute. The recommended oscillator start-up time is dependent on the clock type, and
varies from 6 cycles for an externally applied clock to 32K cycles for a low frequency crystal.
The start-up sequence for the clock includes both the time-out delay and the start-up time when
the device starts up from reset. When starting up from Power-save or Power-down mode, Vcc is
assumed to be at a sufficient level and only the start-up time is included.
Pins XTAL1 and XTAL2 are input and output, respectively, of an inverting amplifier which can be
configured for use as an On-chip Oscillator, as shown in
ceramic resonator may be used.
This Crystal Oscillator is a low power oscillator, with reduced voltage swing on the XTAL2 out-
put. It gives the lowest power consumption, but is not capable of driving other clock inputs.
C1 and C2 should always be equal for both crystals and resonators. The optimal value of the
capacitors depends on the crystal or resonator in use, the amount of stray capacitance, and the
Typ Time-out (V
4.1 ms
65 ms
0 ms
Number of Watchdog Oscillator Cycles
CC
= 5.0V)
CC
Table
, the device issues an internal reset with a time-out delay (t
6-2.
Table
Typ Time-out (V
CC
6-2. The frequency of the Watchdog Oscillator is voltage
to start oscillating and a minimum number of oscillating
4.3 ms
69 ms
0 ms
CC
= 3.0V)
Figure
“On-chip Debug System” on page 46
TOUT
6-2. Either a quartz crystal or a
Number of Cycles
) is timed from the Watchdog
8K (8,192)
512
0
7766A–AVR–03/08
TOUT
) after

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