mc9s12xf512 Freescale Semiconductor, Inc, mc9s12xf512 Datasheet - Page 548
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mc9s12xf512
Manufacturer Part Number
mc9s12xf512
Description
S12x Microcontrollers 16-bit Automotive Microcontroller
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.MC9S12XF512.pdf
(1306 pages)
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Chapter 13 FlexRay Communication Controller (FLEXRAY)
13.6.4.3
The sync frame table area is used to provide a copy of the internal sync frame tables for application access.
Refer to
sync frame table area.
13.6.5
This section provides a detailed description of the usage and the content of the two parts of a physical
message buffer, the message buffer header field and the message buffer data field.
13.6.5.1
The physical message buffers are located in the FRM. The FlexRay block provides no means to protect the
FRM from uncontrolled or illegal host or other client write access. To ensure data consistency of the
physical message buffers, the application must follow the write access scheme that is given in the
description of each of the physical message buffer fields.
13.6.5.2
This section provides a detailed description of the usage and content of the message buffer header field. A
description of the structure of the message buffer header fields is given in
Buffer Header
section, the data field offset, and the slot status section. For a detailed description of the Data Field Offset,
see
13.6.5.2.1
Frame Header Section Content
The semantic and content of the frame header section depends on the message buffer type.
For individual receive message buffers and receive FIFOs, the frame header receives the frame header data
of the first valid frame received on the assigned channels. If a receive message buffer is assigned to both
channels, the first valid frame received on either channel A or channel B is stored.
For receive shadow buffers, the frame header receives the frame header data of the current frame received
regardless of whether the frame is valid or not.
For single and double transmit message buffers, the application writes the frame header of the frame to be
transmitted into this location. The frame header will be read out when the frame is transferred to the
FlexRay bus.
The structure of the frame header in the message buffer header field is given in
description of the frame header fields is given in
548
Section 13.6.2.1.2, “Data Field
Section 13.6.12, “Sync Frame ID and Sync Frame Deviation
Physical Message Buffer Description
Sync Frame Table Area
Message Buffer Protection and Data Consistency
Message Buffer Header Field Description
Field”. Each message buffer header field consists of three sections: the frame header
Frame Header Section Description
MC9S12XF - Family Reference Manual, Rev.1.19
Offset”.
Table
13-84.
Tables” for the description of the
Section 13.6.2.1, “Message
Figure
Freescale Semiconductor
13-105. A detailed
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