mc9s12xf512 Freescale Semiconductor, Inc, mc9s12xf512 Datasheet - Page 782

• Manufacturer Part Number: mc9s12xf512
• Description: S12x Microcontrollers 16-bit Automotive Microcontroller
• Manufacturer: Freescale Semiconductor, Inc

Chapter 16 S12X Debug (S12XDBGV3) Module
16.4.2.1
With range comparisons disabled, the match condition is an exact equivalence of address/data bus with the
value stored in the comparator address/data registers. Further qualification of the type of access (R/W,
word/byte) is possible.
Comparators A and C do not feature SZE or SZ control bits, thus the access size is not compared. The exact
address is compared, thus with the comparator address register loaded with address (n) a word access of
address (n–1) also accesses (n) but does not cause a match.
data bus compare.
accesses DBGXDH must be loaded with the data byte, the low byte must be masked out using the
DBGXDLM mask register. On word accesses the data byte of the lower address is mapped to DBGXDH.
Comparators A and C feature an NDB control bit to determine if a match occurs when the data bus differs
to comparator register contents or when the data bus is equivalent to the comparator register contents.
16.4.2.2
Comparators B and D feature SZ and SZE control bits. If SZE is clear, then the comparator address match
qualification functions the same as for comparators A and C.
If the SZE bit is set the access size (word or byte) is compared with the SZ bit value such that only the
specified type of access causes a match. Thus if configured for a byte access of a particular address, a word
access covering the same address does not lead to match.
782
1. A word access of ADDR[n-1] also accesses ADDR[n] but does not generate a match.
Access
Word
Word
Word
The comparator address register must contain the exact address used in the code.
Byte
Comparators
Comparators
Comparators
Comparators
Comparator
A and C
B and D
B and D
B and D
Exact Address Comparator Match (Comparators A and C)
Exact Address Comparator Match (Comparators B and D)
Address
ADDR[n]
ADDR[n]
ADDR[n]
ADDR[n]
Table 16-38
Table 16-38. Comparator A and C Data Bus Considerations
Table 16-39. Comparator Access Size Considerations
Address
ADDR[n]
ADDR[n]
ADDR[n]
ADDR[n]
DBGxDH
Data[n]
Data[n]
Data[n]
lists access considerations with data bus comparison. To compare byte
MC9S12XF - Family Reference Manual, Rev.1.19
x
Data[n+1]
Data[n+1]
DBGxDL
SZE
x
x
—
0
1
1
SZ8
—
DBGxDHM
X
0
1
$FF
$FF
$FF
$00
Table 16-39
Word and byte accesses of ADDR[n]
Word and byte accesses of ADDR[n]
DBGxDLM
Word accesses of ADDR[n]
Condition For Valid Match
$FF
$00
$00
$FF
MOVW #$WORD ADDR[n]
MOVW #$WORD ADDR[n]
MOVW #$WORD ADDR[n]
Byte accesses of ADDR[n]
MOVB #$BYTE ADDR[n]
MOVB #$BYTE ADDR[n]
MOVB #$BYTE ADDR[n]
lists access considerations without
MOVW #$WORD ADDR[n]
MOVW #$WORD ADDR[n]
MOVW #$WORD ADDR[n]
MOVB #$BYTE ADDR[n]
Example Valid Match
Freescale Semiconductor
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(1)
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