mc9s12xf512 Freescale Semiconductor, Inc, mc9s12xf512 Datasheet - Page 76

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mc9s12xf512

Manufacturer Part Number
mc9s12xf512
Description
S12x Microcontrollers 16-bit Automotive Microcontroller
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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Chapter 1 MC9S12XF-Family Reference Manual
1.6.3.5
The RAM arrays are not initialized out of reset with exception of the EEE buffer RAM (providing the EEE
functionality is enabled).
1.6.3.6
The COP timeout rate bits CR[2:0] and the WCOP bit in the COPCTL register are loaded on rising edge
of RESET from the Flash register FOPT. See
is loaded from the Flash configuration field byte at global address $7FFF0E during the reset sequence.
If the MCU is secured and COP is enabled, the COP timeout rate is always set to the longest period
(CR[2:0] = 111) after COP reset and after any reset into Special Single Chip mode.
76
Memory
COP Configuration
FCTL Register
FCTL Register
MC9S12XF - Family Reference Manual, Rev.1.19
NV[2:0] in
Table 1-14. Initial COP Rate Configuration
NV[3] in
Table 1-15. Initial WCOP Configuration
000
001
010
011
100
101
110
111
1
0
Table 1-14
and
COPCTL Register
COPCTL Register
CR[2:0] in
Table 1-15
WCOP in
111
110
101
100
011
010
001
000
0
1
for coding. The FOPT register
Freescale Semiconductor

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