mc9s12xf512 Freescale Semiconductor, Inc, mc9s12xf512 Datasheet - Page 887

• Manufacturer Part Number: mc9s12xf512
• Description: S12x Microcontrollers 16-bit Automotive Microcontroller
• Manufacturer: Freescale Semiconductor, Inc

Freescale Semiconductor
DDRJ
DDRJ
DDRJ
DDRJ
DDRJ
DDRJ
Field
2-0
7
6
5
4
3
Port J data direction—
This register controls the data direction of pin 7.
1 Associated pin is configured as output.
0 Associated pin is configured as input.
Port J data direction—
This register controls the data direction of pin 6.
The FlexRay forces the I/O state to be an output (STB3) if the strobe signal is enabled. Refer to FlexRay Block Guide.
In this case the data direction bit will not change.
1 Associated pin is configured as output.
0 Associated pin is configured as input.
Port J data direction—
This register controls the data direction of pin 5.
The FlexRay forces the I/O state to be an output (STB2) if the strobe signal is enabled. Refer to FlexRay Block Guide.
In this case the data direction bit will not change.
1 Associated pin is configured as output.
0 Associated pin is configured as input.
Port J data direction—
This register controls the data direction of pin 4.
The FlexRay forces the I/O state to be an output (STB1) if the strobe signal is enabled. Refer to FlexRay Block Guide.
In this case the data direction bit will not change.
1 Associated pin is configured as output.
0 Associated pin is configured as input.
Port J data direction—
This register controls the data direction of pin 3.
The FlexRay forces the I/O state to be an output (STB0) if the strobe signal is enabled. Refer to FlexRay Block Guide.
In this case the data direction bit will not change.
1 Associated pin is configured as output.
0 Associated pin is configured as input.
Port J data direction—
This register controls the data direction of pins 2 through 0.
The PMF forces the I/O state to be an input on the associated IS[2:0] pins if current sense functions are enabled.
Refer to PMF Block Guide. In this case the data direction bit will not change.
1 Associated pin is configured as output.
0 Associated pin is configured as input.
Due to internal synchronization circuits, it can take up to 2 bus clock cycles
until the correct value is read on PTH or PTIH registers, when changing the
DDRH register.
Table 19-54. DDRJ Register Field Descriptions
MC9S12XF - Family Reference Manual, Rev.1.19
NOTE
Description
Chapter 19 Port Integration Module (S12XFPIMV2)
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