msx532 Fairchild Semiconductor, msx532 Datasheet - Page 17

• Manufacturer Part Number: msx532
• Description: 532 Port Digital Crosspoint Switch With Lvttl I/o S
• Manufacturer: Fairchild Semiconductor

Hardware Reset
JTAG Reset
RapidConfigure Reset 1. Device Reset (Instruction 1101)
Introduction
Device Reset Options
At power-on, all MSX532 I/O buffers are set as flow-
through inputs (IN) with input enable ON, and the switch
matrix set to all No Connects (NC).
The RapidConfigure reset, hardware reset, and JTAG reset
functions will program the I/O buffers to flow-through input
(IN) mode with input enable ON, and each Loading SRAM
cell in the Switch Matrix is set to No Connect. An UPDATE
Device Reset Options
Note 3: NC
and set the Active SRAM cells to No Connect.
Note 4: TLR
Programming
Interface
No Connect. Each Loading SRAM cell in the Switch Matrix is updated to No Connect. An UPDATE signal is required to complete the operation
Test Logic Reset State.
(Continued)
Power-on Reset
HW_RST (Low Pulse)
1. Low Pulse on TRST
2. TMS High for 5 SCLK Cycles
3. Device Reset (Instruction 1101)
4. Reset Crosspoint Array (Instruction 1101) Unchanged NC (Note 3)
2. Reset Crosspoint Array (Instruction 0010) Unchanged NC (Note 3)
Method
Reset
17
signal is required to complete the operation and set the
Active SRAM cells to No Connect.
The JTAG interface can be reset via the TRST pin or by
clocking five consecutive one to the TMS pin. The hard-
ware reset pin can be done accomplished through the
HW_RST pin (Active LOW). RC reset can be accomplished
by applying the RC Instruction 1101 to the RCI[3:0] pins.
Unchanged Unchanged
Unchanged Unchanged
Port
I/O
IN
IN
IN
IN
NC (Note 4) 1 (RC Enabled)
NC (Note 3) 1 (RC Enabled)
NC (Note 3) 1 (RC Enabled) Unchanged
Switch
Matrix
NC
1 (RC Enabled) TLR (Note 3)
Unchanged
Unchanged
Unchanged
Unchanged
RCE Mode
Control
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Unchanged
Unchanged
JTAG
TAP
TLR
TLR
TLR
TLR