lrs1338a Sharp Microelectronics of the Americas, lrs1338a Datasheet - Page 21

• Manufacturer Part Number: lrs1338a
• Description: Stacked Chip Flash Memory Sram
• Manufacturer: Sharp Microelectronics of the Americas

Stacked Chip (8M Flash & 2M SRAM)
FLASH DC CHARACTERISTICS
NOTES:
1. All currents are in RMS unless otherwise noted.
2. CMOS inputs are either V
3. Automatic Power Savings (APS) reduces typical I
4. Sampled, not 100% tested.
5. I
Data Sheet
SYMBOL
I
V
I
I
are either V
3.3 V V
or word written while in erase suspend mode, the device’s current
draw is the sum of I
I
V
V
V
I
CCWS
V
I
PPWS
CCWS
I
I
I
I
CCES
I
I
I
I
PPES
V
CCW
V
PPW
V
I
CCS
CCD
CCR
CCE
PPS
PPR
PPD
PPE
V
PPLK
I
OH1
OH2
PPH
LKO
LO
LI
OL
HH
IH
IL
and I
CC
in static operation.
Input Load Current
Output Leakage Current
V
V
V
V
V
V
Erase Suspend Current
V
V
V
V
V
Suspend Current
Input LOW Voltage
Input HIGH Voltage
Output LOW Voltage
Output HIGH Voltage (TTL)
Output HIGH Voltage (CMOS)
V
Normal Operations
V
Erase Operations
V
RP Unlock Voltage
CCES
IL
CC
CC
CC
CC
CC
CC
PP
PP
PP
PP
PP
PP
PP
CC
or V
Standby or Read Current
Deep Power-Down Current
Word Write Current
Block Erase Current
Word Write or Block Erase
Lockout during
during Word Write or Block
Standby Current
Deep Power-Down Current
Read Current
Word Write Current
Block Erase Current
Word Write or Block
Lockout Voltage
are specified with the device de-selected. If read
IH
CCWS
.
PARAMETER
or I
CC
CCES
± 0.2 V or GND ± 0.2 V. TTL inputs
and I
CCR
or I
CCW
0.85 V
CCR
V
V
, respectively.
CC
CC
MIN.
11.4
-0.5
0.2
0.1
2.0
2.4
2.7
2.0
25
15
±2
10
12
10
4
5
4
1
8
to 3 mA at
-0.4
= 2.7 V to 3.6 V
CC
V
CC
MAX.
±0.5
±0.5
20.0
12.6
±15
200
0.8
0.4
1.5
3.6
50
20
25
30
17
17
40
25
2
6
5
+ 0.5
6. Block erases and word writes are inhibited when V
7. Block erases and word writes are inhibited when the correspond-
8. RP connection to a V
and not guaranteed in the range between V
V
ing RP = V
are not guaranteed with V
should not be attempted.
lative period of 80 hours.
UNIT
PPH
mA
mA
mA
mA
mA
mA
mA
mA
µA
µA
µA
µA
µA
µA
µA
µA
V
V
V
V
V
V
V
V
V
V
(MIN.).
V
V
CMOS Inputs, V
CE = RP = V
TTL Inputs, V
CE = RP = V
RP = GND ± 0.2 V
CMOS Inputs, V
CE = GND, f = 5 MHz, I
TTL Inputs, V
CE = GND, f = 5 MHz, I
V
V
CE = V
V
V
RP = GND ± 0.2 V
V
V
V
V
V
V
V
Unable WP
IH
CC
CC
PP
PP
PP
PP
PP
PP
PP
CC
CC
CC
CC
or WP = V
= V
= V
> V
= V
= V
= V
= V
= V
= V
= V
= V
= V
V
IH
PPH
PPH
CC
CC
PPH
PPH
PPH
CC
CC
CC
CC
CC
CC
HH
MAX., V
MAX., V
MIN., I
MIN., I
MIN., I
MIN., I
CONDITIONS
IL
CC
IH
supply is allowed for a maximum cumu-
CC
CC
. Block erase and word write operations
CC
± 0.2 V
TEST
CC
CC
= V
= V
OL
OH
OH
OH
< 3.0 V or V
= V
= V
IN
OUT
CC
CC
= 2.0 mA
= 1.0 mA
= 2.5 mA
= -100 µA
= V
CC
CC
MAX.,
MAX.,
OUT
OUT
= V
CC
MAX.,
MAX.,
CC
= 0 mA
= 0 mA
or GND
or GND
IH
PPLK
< RP < V
LRS1338A
PP
(MAX.) and
NOTES
1, 2, 3
1, 2, 3
HH
1, 2
1, 2
1, 4
1, 4
1, 5
1, 4
1, 4
4, 6
7, 8
V
1
1
1
1
1
1
1
4
4
4
4
4
4
PPLK
and
21
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