lrs1338a Sharp Microelectronics of the Americas, lrs1338a Datasheet - Page 25
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lrs1338a
Manufacturer Part Number
lrs1338a
Description
Stacked Chip Flash Memory Sram
Manufacturer
Sharp Microelectronics of the Americas
Datasheet
1.LRS1338A.pdf
(36 pages)
Stacked Chip (8M Flash & 2M SRAM)
ALTERNATIVE CE CONTROLLED WRITES
NOTES:
1. In systems where CE defines the write pulse width (within a longer WE timing waveform),
2. Sampled, not 100% tested.
3. Refer to Table 6 for valid A
4. V
Data Sheet
V
SYMBOL
all setup, hold, and inactive WE times should be measured relative to the CE waveform.
determination of block erase or word write success (SR.1, SR.3, SR.4, SR.5 = 0).
PP
t
CC
t
PHHEH
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
EHWH
SHEH
DVEH
EHDX
QVPH
AVAV
PHEL
WLEL
ELEH
VPEH
AVEH
EHAX
EHEL
EHGL
QVVL
QVSL
should be held at V
= 2.7 V to 3.6 V, T
Write Cycle Time
RP HIGH Recovery to CE Going LOW
WE Setup to CE Going LOW
CE Pulse Width
RP V
WP V
V
Address Setup to CE Going HIGH
Data Setup to CE Going HIGH
Data Hold from CE HIGH
Address Hold from CE HIGH
WE Hold from CE HIGH
CE Pulse Width HIGH
Write Recovery before Read
V
RP V
WP V
PP
PP
Setup to CE Going HIGH
Hold from Valid SRD HIGH
HH
HH
IH
IH
PPH
Setup to CE Going HIGH
Hold from Valid SRD HIGH
Setup to CE Going HIGH
Hold from Valid SRD HIGH
IN
(and if necessary RP should be held at V
A
PARAMETER
and D
= 40°C to +85°C
IN
for block erase or word write.
1
MIN.
120
100
100
100
70
50
50
25
1
0
5
5
0
0
0
0
0
HH
) until
MAX.
UNIT
ns
µs
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
NOTES
2, 4
2, 4
2, 4
2
2
2
2
3
3
LRS1338A
25