gs8662d08bgd-333i GSI Technology, gs8662d08bgd-333i Datasheet - Page 16

• Manufacturer Part Number: gs8662d08bgd-333i
• Description: 72mb Sigmaquad-ii Burst Of 4 Sram
• Manufacturer: GSI Technology

Rev: 1.00 5/2010
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
D Count = 2
READ
Notes:
1.
2.
3.
4.
Internal burst counter is fixed as 2-bit linear (i.e., when first address is A0+0, next internal burst address is A0+1.
“READ” refers to read active status with R = Low, “READ” refers to read inactive status with R = High. The same is
true for “WRITE” and “WRITE”.
Read and write state machine can be active simultaneously.
State machine control timing sequence is controlled by K.
D Count = 1
D Count = D Count + 1
READ
Always
Read Address
Read Address
D Count = 0
Read NOP
DDR Read
Increment
Load New
READ
D Count = 2
Always
READ
READ
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State Diagram
Power-Up
WRITE
GS8662D08/09/18/36BD-333/300/250/200/167
D Count = 2
WRITE
D Count = D Count + 1
Always
WRITE
Write Address
Write Address
D Count = 0
Write NOP
DDR Write
Increment
Load New
Always
D Count = 1
WRITE
© 2010, GSI Technology
Preliminary
D Count = 2
WRITE