gs8662d08bgd-333i GSI Technology, gs8662d08bgd-333i Datasheet - Page 8

• Manufacturer Part Number: gs8662d08bgd-333i
• Description: 72mb Sigmaquad-ii Burst Of 4 Sram
• Manufacturer: GSI Technology

SigmaQuad-II B4 SRAM DDR Write
The status of the Address Input, W, and R pins are sampled by the rising edges of K. W and R high causes chip disable. A low on
the Write Enable-bar pin, W, and a high on the Read Enable-bar pin, R, begins a write cycle. W is always ignored if the previous
command was a write command. Data is clocked in by the next rising edge of K, the rising edge of K after that, the next rising edge
of K, and finally by the next rising edge of K.
Rev: 1.00 5/2010
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Address
BWx
CQ
CQ
W
R
D
C
C
Q
K
K
A
Write A
A
NOP
B
Read B
8/36
A+3
C
Write C
GS8662D08/09/18/36BD-333/300/250/200/167
B
D
C
Read D
B+1
B+2
E
Write E
B+3
D
© 2010, GSI Technology
NOP
Preliminary
D+1
D+2