ST10 STMICROELECTRONICS [STMicroelectronics], ST10 Datasheet - Page 14

• Manufacturer Part Number: ST10
• Description: 16-BIT MCU WITH 32K BYTE ROM
• Manufacturer: STMICROELECTRONICS [STMicroelectronics]

ST10C167
VII - INTERRUPT SYSTEM
The interrupt response time for internal program
execution is from 200ns to 480ns.
The ST10C167 architecture supports several
mechanisms for fast and flexible response to ser-
vice requests that can be generated from various
sources internal or external to the microcontroller.
Any of these interrupt requests can be serviced by
the Interrupt Controller or by the Peripheral Event
Controller (PEC).
In contrast to a standard interrupt service where
the current program execution is suspended and
a branch to the interrupt vector table is performed,
just one cycle is ‘stolen’ from the current CPU
activity to perform a PEC service. A PEC service
implies a single Byte or Word data transfer
between any two memory locations with an addi-
tional increment of either the PEC source or the
destination pointer. An individual PEC transfer
counter is implicitly decremented for each PEC
service except when performing in the continuous
transfer mode. When this counter reaches zero, a
standard interrupt is performed to the correspond-
ing source related vector location. PEC services
are very well suited, for example, for supporting
the transmission or reception of blocks of data.
The ST10C167 has 8 PEC channels each of
Table 2 : Interrupt sources
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CAPCOM Register 0
CAPCOM Register 1
CAPCOM Register 2
CAPCOM Register 3
CAPCOM Register 4
CAPCOM Register 5
CAPCOM Register 6
CAPCOM Register 7
CAPCOM Register 8
CAPCOM Register 9
CAPCOM Register 10
CAPCOM Register 11
CAPCOM Register 12
CAPCOM Register 13
CAPCOM Register 14
CAPCOM Register 15
CAPCOM Register 16
CAPCOM Register 17
Source of Interrupt or PEC
Service Request
Request
CC10IR
CC12IR
CC13IR
CC14IR
CC15IR
CC16IR
CC17IR
CC11IR
CC0IR
CC1IR
CC2IR
CC3IR
CC4IR
CC5IR
CC6IR
CC7IR
CC8IR
CC9IR
Flag
CC10IE
CC11IE
CC12IE
CC13IE
CC14IE
CC15IE
CC16IE
CC17IE
Enable
CC0IE
CC1IE
CC2IE
CC3IE
CC4IE
CC5IE
CC6IE
CC7IE
CC8IE
CC9IE
Flag
which offers such fast interrupt-driven data trans-
fer capabilities.
A interrupt control register which contains an
interrupt request flag, an interrupt enable flag and
an interrupt priority bitfield is dedicated to each
existing interrupt source. Thanks to its related
register, each source can be programmed to one
of sixteen interrupt priority levels. Once starting to
be processed by the CPU, an interrupt service
can only be interrupted by a higher prioritized
service request. For the standard interrupt
processing, each of the possible interrupt sources
has a dedicated vector location.
Fast external interrupt inputs are provided to ser-
vice external interrupts with high precision
requirements. These fast interrupt inputs feature
programmable edge detection (rising edge, falling
edge or both edges).
Software interrupts are supported by means of the
‘TRAP’ instruction in combination with an individ-
ual trap (interrupt) number.
Table 2 shows all the available ST10C167 inter-
rupt sources and the corresponding hard-
ware-related interrupt flags, vectors, vector
locations and trap (interrupt) numbers :
Interrupt
CC10INT
CC12INT
CC13INT
CC14INT
CC15INT
CC16INT
CC17INT
CC11INT
CC0INT
CC1INT
CC2INT
CC3INT
CC4INT
CC5INT
CC6INT
CC7INT
CC8INT
CC9INT
Vector
Location
00’004Ch
00’005Ch
00’006Ch
00’007Ch
00’00C0h
00’00C4h
00’0040h
00’0044h
00’0048h
00’0050h
00’0054h
00’0058h
00’0060h
00’0064h
00’0068h
00’0070h
00’0074h
00’0078h
Vector
Number
Trap
1Ah
1Bh
1Ch
1Dh
1Eh
1Fh
10h
11h
12h
13h
14h
15h
16h
17h
18h
19h
30h
31h