ST10 STMICROELECTRONICS [STMicroelectronics], ST10 Datasheet - Page 18

• Manufacturer Part Number: ST10
• Description: 16-BIT MCU WITH 32K BYTE ROM
• Manufacturer: STMICROELECTRONICS [STMicroelectronics]

ST10C167
IX - GENERAL PURPOSE TIMER UNIT
The GPT unit is a flexible multifunctional timer/
counter structure which is used for time related
tasks such as event timing and counting, pulse
width and duty cycle measurements, pulse
generation, or pulse multiplication. The GPT unit
contains five 16-bit timers organized into two
separate modules GPT1 and GPT2. Each timer in
each module may operate independently in
several different modes, or may be concatenated
with another timer of the same module.
IX.1 - GPT1
Each of the three timers T2, T3, T4 of the GPT1
module can be configured individually for one of
four basic modes of operation: timer, gated
timer, counter mode and incremental interface
mode. In timer mode, the input clock for a timer is
derived from the CPU clock, divided by a pro-
grammable prescaler. In counter mode, the timer
is clocked in reference to external events. Pulse
width or duty cycle measurement is supported in
gated timer mode where the operation of a timer is
controlled by the ‘gate’ level on an external input
pin. For these purposes, each timer has one asso-
ciated port pin (TxIN) which is the gate or the
clock input.
The table below lists the timer input frequencies,
resolution and periods for each pre-scaler option
at 25MHz CPU clock. This also applies to the
Gated Timer Mode of T3 and to the auxiliary
timers T2 and T4 in Timer and Gated Timer Mode
(see Table 6).
The count direction (up/down) for each timer is
programmable by software or may additionally be
Table 6 : GPT1 timer input frequencies, resolution and periods
18/65
Pre-scaler factor
Input Frequency
Resolution
Period
f
CPU
= 25MHz
3.125MHz 1.563MHz
21.0ms
320ns
000
8
B
41.9ms
640ns
001
16
B
781.3KHz
83.9ms
1.28 s
010
32
Timer Input Selection T2I / T3I / T4I
B
390.6KHz
2.56 s
167ms
011
64
altered dynamically by an external signal on a port
pin (TxEUD).
In Incremental Interface Mode, the GPT1 timers
(T2, T3, T4) can be directly connected to the
incremental position sensor signals A and B by
their respective inputs TxIN and TxEUD. Direction
and count signals are internally derived from
these two input signals so that the contents of the
respective timer Tx corresponds to the sensor
position. The third position sensor signal TOP0
can be connected to an interrupt input.
Timer T3 has output toggle latches (TxOTL) which
changes state on each timer over-flow/underflow.
The state of this latch may be output on port pins
(TxOUT) e. g. for time out monitoring of external
hardware components, or may be used internally
to clock timers T2 and T4 for high resolution mea-
surement of long time periods.
In addition to their basic operating modes, timers
T2 and T4 may be configured as reload or capture
registers for timer T3. When used as capture or
reload registers, timers T2 and T4 are stopped.
The contents of timer T3 is captured into T2 or T4
in response to a signal at their associated input
pins (TxIN). Timer T3 is reloaded with the
contents of T2 or T4 triggered either by an
external signal or by a selectable state transition
of its toggle latch T3OTL. When both T2 and T4
are configured to alternately reload T3 on
opposite state transitions of T3OTL with the low
and high times of a PWM signal, this signal
can be constantly generated without software
intervention.
B
195.3KHz
5.12 s
336ms
100
128
B
97.66KHz
10.24 s
671ms
101
256
B
48.83KHz
20.48 s
1.34s
110
512
B
24.41KHz
40.96 s
2.68s
1024
111
B