h8s-2158 Renesas Electronics Corporation., h8s-2158 Datasheet - Page 818

no-image

h8s-2158

Manufacturer Part Number
h8s-2158
Description
Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2100 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
Section 26 Clock Pulse Generator
26.3
The medium-speed clock divider divides the system clock ( ), and generates /2, /4, /8, /16,
and /32 clocks.
26.4
The bus master clock select circuit selects a clock to supply the bus master with either the system
clock ( ) or medium-speed clock ( /2, /4, /8, /16, or /32) by the SCK2 to SCK0 bits in
SBYCR.
26.5
The subclock input circuit controls subclock input from the EXCL pin. To use the subclock, a
32.768-kHz external clock should be input from the EXCL pin. At this time, the P96DDR bit in
P9DDR should be cleared to 0, and the EXCLE bit in LPWRCR should be set to 1.
Subclock input conditions are shown in table 26.5. When the subclock is not used, subclock input
should not be enabled.
Table 26.5 Subclock Input Conditions
Rev. 3.00 Jan 25, 2006 page 766 of 872
REJ09B0286-0300
Item
Subclock input pulse width
low level
Subclock input pulse width
high level
Subclock input rising time
Subclock input falling time
Bus Master Clock Select Circuit
Medium-Speed Clock Divider
Subclock Input Circuit
Symbol
t
t
t
t
EXCLL
EXCLH
EXCLr
EXCLf
Min
VCC = 2.7 to 3.6 V
Typ
15.26
15.26
Max
10
10
Unit
ns
ns
s
s
Measurement
Condition
Figure 26.7

Related parts for h8s-2158