TDA935x Philips, TDA935x Datasheet - Page 35

• Manufacturer Part Number: TDA935x
• Description: TV Signal Processor-Teletext Decoder with Embedded u-Controller
• Manufacturer: Philips

Philips Semiconductors
5. Enable INT1 using the IE SFR.
6. Enter Power-Down/Idle. Upon wake-up the SAD
I2C Serial I/O Bus
The I
clock line (SCL). The definition of the I
found in the 80C51 based 8-bit micro-controllers - Philips
Semiconductors (ref. IC20).
The device operates in four modes: -
The micro-controller peripheral is controlled by the Serial
Control SFR (S1CON) and its Status is indicated by the
status SFR (S1STA). Information is transmitted/received
to/from the I
Slave Address SFR (S1ADR) is used to configure the
slave address of the peripheral.
The byte level I
port on the 8xC558, except for the clock rate selection bits
CR<2:0>. The operation of the subsystem is described in
detail in the 8xC558 data sheet and can be found in the
80C51 based 8-bit micro-controllers - Philips
Semiconductors (ref. IC20).
Three different IIC selection tables for CR<2:0> can be
configured using the ROMBANK SFR (IIC_LUT<1:0>) as
follows: -
‘558 nominal mode’ (iic_lut=”00”)
This option accommodates the 558 I2C. The various serial
rates are shown below: -
Table 7 IIC Serial Rates ‘558 nominal mode’
2001 Jan 18
CR2
Master Transmitter
Master Receiver
Slave Transmitter
Slave Receiver
TV signal processor-Teletext decoder with
embedded -Controller
0
0
0
0
1
1
1
1
should be restored to its conventional operating mode
by disabling the ’DC_COMP’ control bit.
2
C bus consists of a serial data line (SDA) and a serial
CR1
0
0
1
1
0
0
1
1
2
C bus using the Data SFR (S1DAT) and the
2
CR0
C serial port is identical to the I
0
1
0
1
0
1
0
1
f
divided by
clk
1600
3200
(6MHz)
240
160
120
60
40
30
2
I2C Bit Frequency
C protocol can be
(KHz) at f
1.875
3.75
37.5
100
150
200
25
50
2
C serial
clk
35
‘558 fast mode’ (iic_lut=”01”)
This option accommodates the 558 I
shown below: -
‘558 slow mode’ (iic_lut=”10”)
This option accommodates the 558 I
as shown below: -
Note: In the above tables the f
the 80c51 IIC module (6MHz).
I2C Port Enable
One external I
using TXT21.I2C PORT0. Any information transmitted to
the device can only be acted upon if the port is enabled.
Internal communication between the 80c51
micro-controller and the TV Signal Processor will continue
regardless of the value written to TXT21.I2C PORT0.
LED Support
Port pins P0.5 and P0.6 have a 8mA current sinking
capability to enable LEDs in series with current limiting
resistors to be driven directly, without the need for
additional buffering circuitry.
Table 8 IIC Serial Rates ‘558 fast mode’
Table 9 IIC Serial Rates ‘558 slow mode’
CR2
CR2
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
TDA935X/6X/8X PS/N2 series
CR1
CR1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
2
C port is available. This port is enabled
CR0
CR0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
f
f
divided by
divided by
clk
clk
Tentative Device Specification
1600
3200
6400
(6MHz)
(6MHz)
clk
800
120
120
480
320
240
30
20
15
80
60
80
60
relates to the clock rate of
2
2
C rates divided by 2
C doubled rates as
I2C Bit Frequency
I2C Bit Frequency
(KHz) at f
0.9375
(KHz) at f
1.875
18.75
3.75
12.5
200
300
400
100
100
7.5
50
75
50
75
25
clk
clk