TDA935x Philips, TDA935x Datasheet - Page 64

• Manufacturer Part Number: TDA935x
• Description: TV Signal Processor-Teletext Decoder with Embedded u-Controller
• Manufacturer: Philips

Philips Semiconductors
Colour decoder
The ICs can decode PAL, SECAM and NTSC signals. The
PAL/NTSC decoder does not need external reference
crystals but has an internal clock generator which is
stabilised to the required frequency by using the 12 MHz
clock signal from the reference oscillator of the
Under bad-signal conditions (e.g. VCR-playback in feature
mode), it may occur that the colour killer is activated
although the colour PLL is still in lock. When this killing
action is not wanted it is possible to overrule the colour
killer by forcing the colour decoder to the required standard
and to activate the FCO-bit (Forced Colour On) in
subaddress 21H.
The Automatic Colour Limiting (ACL) circuit (switchable
via the ACL bit in subaddress 20H) prevents that
oversaturation occurs when PAL/NTSC signals with a high
chroma-to-burst ratio are received. The ACL circuit is
designed such that it only reduces the chroma signal and
not the burst signal. This has the advantage that the colour
sensitivity is not affected by this function.
The SECAM decoder contains an auto-calibrating PLL
demodulator which has two references, viz: the divided 12
MHz reference frequency (obtained from the -Controller)
which is used to tune the PLL to the desired free-running
frequency and the bandgap reference to obtain the correct
absolute value of the output signal. The VCO of the PLL is
calibrated during each vertical blanking period, when the
IC is in search or SECAM mode.
The base-band delay line (TDA 4665 function) is
integrated. This delay line is also active during NTSC to
obtain a good suppression of cross colour effects. The
demodulated colour difference signals are internally
supplied to the delay line.
RGB output circuit and black-current stabilization
In the RGB control circuit the signal is controlled on
contrast, brightness and saturation. The ICs have a linear
input for external RGB/YUV signals. Switching between
RGB and the YUV mode can be realised via the YUV bit in
subaddress 2BH. The signals for OSD and text are
internally supplied to the control circuit. The output signal
has an amplitude of about 2 V black-to-white at nominal
input signals and nominal settings of the various controls.
To obtain an accurate biasing of the picture tube the
‘Continuous Cathode Calibration’ (CCC) system has been
included in these ICs. When required the operation of the
CCC system can be changed into a one-point black
current system. The switching between the 2 possibilities
2001 Jan 18
-Controller.
TV signal processor-Teletext decoder with
embedded -Controller
64
is realised by means of the OPC bit in subaddress 2BH.
When used as one-point control loop the system will
control the black level of the RGB output signals to the
‘low’ reference current and not on the cut off point of the
cathode. In this way spreads in the picture tube
characteristics will no take into account. A further
consequence is that the RGB output signals have a fixed
amplitude (2 V
‘cathode drive level’ bits (CL3-CL0) have no effect on
these amplitudes. For this reason the gain of the RGB
output stages has to be adapted to the required drive level
of the cathodes.
A black level off-set can be made with respect to the level
which is generated by the black current stabilization
system. In this way different colour temperatures can be
obtained for the bright and the dark part of the picture.
In the V
stabilization system checks the output level of the 3
channels and indicates whether the black level of the
highest output is in a certain window (WBC-bit) or below or
above this window (HBC-bit). This indication can be read
from the status byte 01 and can be used for automatic
adjustment of the V
TV receiver. During this test the vertical scan remains
active so that the indication of the 2 bits can be made
visible on the TV screen.
The control circuit contains a beam current limiting circuit
and a peak white limiting circuit. To prevent that the peak
white limiting circuit reacts on the high frequency content
of the video signal a low-pass filter is inserted in front of the
peak detector.
During switch-off of the TV receiver a fixed beam current
is generated by the black current control circuit. This
current ensures that the picture tube capacitance is
discharged. During the switch-off period the vertical
deflection can be placed in an overscan position so that
the discharge is not visible on the screen.
A wide blanking pulse can be activated in the RGB outputs
by means of the HBL bit in subaddress 2BH. The timing of
this blanking can be adjusted by means of the bits WBF/R
bits in subaddress 03H.
g2
TDA935X/6X/8X PS/N2 series
adjustment mode (AVG = 1) the black current
P-P
under nominal conditions) and that the
g2
voltage during the production of the
Tentative Device Specification