AMD-K6 AMD [Advanced Micro Devices], AMD-K6 Datasheet - Page 214

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AMD-K6

Manufacturer Part Number
AMD-K6
Description
AMD-K6 Processor
Manufacturer
AMD [Advanced Micro Devices]
Datasheet

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AMD-K6
10.3
196
®
Processor Data Sheet
SMM State-Save Area
When the processor acknowledges an SMI# interrupt by
asserting SMIACT#, it saves its state in a 512-byte SMM
state-save area shown in Table 34. The save begins at the top of
the SMM memory area (SMM base address + FFFFh) and fills
down to SMM base address + FE00h.
Table 34 shows the offsets in the SMM state-save area relative
to the SMM base address. The SMM service routine can alter
any of the read/write values in the state-save area.
Table 34. SMM State-Save Area Map
FFFCh
FFF8h
FFF4h
FFF0h
FFECh
FFE8h
FFE4h
FFE0h
FFDCh
FFD8h
FFD4h
FFD0h
FFCCh
FFC8h
FFC4h
FFC0h
FFBCh
FFB8h
FFB4h
FFB0h
FFACh
FFA8h
Notes:
— No data dump at that address
*
Only contains information if SMI# is asserted during a valid I/O bus cycle.
System Management Mode (SMM)
Preliminary Information
Address Offset
CR0
CR3
EFLAGS
EIP
EDI
ESI
EBP
ESP
EBX
EDX
ECX
EAX
DR6
DR7
TR
LDTR Base
GS
FS
DS
SS
CS
ES
Contents Saved
20695H/0—March 1998
Chapter 10

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